From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 655A5288519 for ; Tue, 29 Jul 2025 09:58:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753783083; cv=none; b=bqmAlKyCUZ2JWZ4vPXmiQcnXpqyw7JerqP26kucVEstk/vgUQAPVruAYg1ubYmZJ5QU/XYSvEZA8P3VhNoN6iHNhb/xluprPmhnIl1z4geNw9byAAgbooG+zXU/RVM1GHCO5QBFc8jcyz2xg99SFNpRdtIIAJe1UR9wIcbQc0EU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753783083; c=relaxed/simple; bh=Z09gdlGRfB+MER0OdX9mJf7qfE/b2oQOG7Ab5bIRaXU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=jPX7OuadQRo22NzN287egoeWacyizGtierIJz9rSo4zxz/1VGNkCKLfvjmxqoYHyG6uRk3pTnSevwMEUTRBtZma+tDbWljmSQqzNJ3RPKr9gtmjigjwvjQcTD4o3+7Oydmt+U5+C35xZcbkcubP7tQ/i1do8xOOoEgLrhNYT3gA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 660A82328; Tue, 29 Jul 2025 02:57:48 -0700 (PDT) Received: from donnerap.arm.com (donnerap.manchester.arm.com [10.32.101.27]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 30FFD3F673; Tue, 29 Jul 2025 02:57:55 -0700 (PDT) From: Andre Przywara To: Will Deacon , Julien Thierry , Marc Zyngier Cc: kvm@vger.kernel.org, kvmarm@lists.linux.dev, Alexandru Elisei Subject: [PATCH kvmtool v3 3/6] arm64: nested: add support for setting maintenance IRQ Date: Tue, 29 Jul 2025 10:57:42 +0100 Message-Id: <20250729095745.3148294-4-andre.przywara@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250729095745.3148294-1-andre.przywara@arm.com> References: <20250729095745.3148294-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Uses the new VGIC KVM device attribute to set the maintenance IRQ. This is fixed to use PPI 9, as a platform decision made by kvmtool, matching the SBSA recommendation. Signed-off-by: Andre Przywara --- arm64/arm-cpu.c | 3 ++- arm64/gic.c | 21 ++++++++++++++++++++- arm64/include/kvm/gic.h | 2 +- 3 files changed, 23 insertions(+), 3 deletions(-) diff --git a/arm64/arm-cpu.c b/arm64/arm-cpu.c index 69bb2cb2c..1e456f2c6 100644 --- a/arm64/arm-cpu.c +++ b/arm64/arm-cpu.c @@ -14,7 +14,8 @@ static void generate_fdt_nodes(void *fdt, struct kvm *kvm) { int timer_interrupts[4] = {13, 14, 11, 10}; - gic__generate_fdt_nodes(fdt, kvm->cfg.arch.irqchip); + gic__generate_fdt_nodes(fdt, kvm->cfg.arch.irqchip, + kvm->cfg.arch.nested_virt); timer__generate_fdt_nodes(fdt, kvm, timer_interrupts); pmu__generate_fdt_nodes(fdt, kvm); } diff --git a/arm64/gic.c b/arm64/gic.c index b0d3a1abb..7461b0f3f 100644 --- a/arm64/gic.c +++ b/arm64/gic.c @@ -11,6 +11,8 @@ #define IRQCHIP_GIC 0 +#define GIC_MAINT_IRQ 9 + static int gic_fd = -1; static u64 gic_redists_base; static u64 gic_redists_size; @@ -302,10 +304,15 @@ static int gic__init_gic(struct kvm *kvm) int lines = irq__get_nr_allocated_lines(); u32 nr_irqs = ALIGN(lines, 32) + GIC_SPI_IRQ_BASE; + u32 maint_irq = GIC_MAINT_IRQ + 16; /* PPI */ struct kvm_device_attr nr_irqs_attr = { .group = KVM_DEV_ARM_VGIC_GRP_NR_IRQS, .addr = (u64)(unsigned long)&nr_irqs, }; + struct kvm_device_attr maint_irq_attr = { + .group = KVM_DEV_ARM_VGIC_GRP_MAINT_IRQ, + .addr = (u64)(unsigned long)&maint_irq, + }; struct kvm_device_attr vgic_init_attr = { .group = KVM_DEV_ARM_VGIC_GRP_CTRL, .attr = KVM_DEV_ARM_VGIC_CTRL_INIT, @@ -325,6 +332,13 @@ static int gic__init_gic(struct kvm *kvm) return ret; } + if (kvm->cfg.arch.nested_virt && + !ioctl(gic_fd, KVM_HAS_DEVICE_ATTR, &maint_irq_attr)) { + ret = ioctl(gic_fd, KVM_SET_DEVICE_ATTR, &maint_irq_attr); + if (ret) + return ret; + } + irq__routing_init(kvm); if (!ioctl(gic_fd, KVM_HAS_DEVICE_ATTR, &vgic_init_attr)) { @@ -342,7 +356,7 @@ static int gic__init_gic(struct kvm *kvm) } late_init(gic__init_gic) -void gic__generate_fdt_nodes(void *fdt, enum irqchip_type type) +void gic__generate_fdt_nodes(void *fdt, enum irqchip_type type, bool nested) { const char *compatible, *msi_compatible = NULL; u64 msi_prop[2]; @@ -350,6 +364,8 @@ void gic__generate_fdt_nodes(void *fdt, enum irqchip_type type) cpu_to_fdt64(ARM_GIC_DIST_BASE), cpu_to_fdt64(ARM_GIC_DIST_SIZE), 0, 0, /* to be filled */ }; + u32 maint_irq[3] = {cpu_to_fdt32(1), cpu_to_fdt32(GIC_MAINT_IRQ), + cpu_to_fdt32(0xff04)}; switch (type) { case IRQCHIP_GICV2M: @@ -377,6 +393,9 @@ void gic__generate_fdt_nodes(void *fdt, enum irqchip_type type) _FDT(fdt_property_cell(fdt, "#interrupt-cells", GIC_FDT_IRQ_NUM_CELLS)); _FDT(fdt_property(fdt, "interrupt-controller", NULL, 0)); _FDT(fdt_property(fdt, "reg", reg_prop, sizeof(reg_prop))); + if (nested) + _FDT(fdt_property(fdt, "interrupts", maint_irq, + sizeof(maint_irq))); _FDT(fdt_property_cell(fdt, "phandle", PHANDLE_GIC)); _FDT(fdt_property_cell(fdt, "#address-cells", 2)); _FDT(fdt_property_cell(fdt, "#size-cells", 2)); diff --git a/arm64/include/kvm/gic.h b/arm64/include/kvm/gic.h index ad8bcbf21..1541a5824 100644 --- a/arm64/include/kvm/gic.h +++ b/arm64/include/kvm/gic.h @@ -36,7 +36,7 @@ struct kvm; int gic__alloc_irqnum(void); int gic__create(struct kvm *kvm, enum irqchip_type type); int gic__create_gicv2m_frame(struct kvm *kvm, u64 msi_frame_addr); -void gic__generate_fdt_nodes(void *fdt, enum irqchip_type type); +void gic__generate_fdt_nodes(void *fdt, enum irqchip_type type, bool nested); u32 gic__get_fdt_irq_cpumask(struct kvm *kvm); int gic__add_irqfd(struct kvm *kvm, unsigned int gsi, int trigger_fd, -- 2.25.1