[kvm-unit-tests PATCH 05/17] x86/vmx: basic integration for new vmx.h

[Jon Kohler <jon@nutanix.com>]

Integrate Linux's vmx.h to vmx.c / vmx_tests.c, and do misc cleanup
to remove conflicting definitions from the original vmx.h.

Make minor modifications to the new vmx.h to update includes to fit
into the KUT repository as a standalone header file.

Replaced WARN_ON_ONCE in vmx_eptp_page_walk_level with report_info.

Renamed struct vmcs_field to struct vmcs_field_struct to avoid conflict
with the new vmx.h's enum vmcs_field.

Signed-off-by: Jon Kohler <jon@nutanix.com>

---
 lib/linux/vmx.h | 15 +++++----
 x86/vmx.c       | 16 +++++-----
 x86/vmx.h       | 82 -------------------------------------------------
 x86/vmx_tests.c |  6 +---
 4 files changed, 17 insertions(+), 102 deletions(-)

diff --git a/lib/linux/vmx.h b/lib/linux/vmx.h
index cca7d664..5973bd86 100644
--- a/lib/linux/vmx.h
+++ b/lib/linux/vmx.h
@@ -12,13 +12,10 @@
 #define VMX_H
 
 
-#include <linux/bitops.h>
-#include <linux/bug.h>
-#include <linux/types.h>
-
-#include <uapi/asm/vmx.h>
-#include <asm/trapnr.h>
-#include <asm/vmxfeatures.h>
+#include "bitops.h"
+#include "libcflat.h"
+#include "trapnr.h"
+#include "util.h"
 
 #define VMCS_CONTROL_BIT(x)	BIT(VMX_FEATURE_##x & 0x1f)
 
@@ -552,7 +549,9 @@ static inline u8 vmx_eptp_page_walk_level(u64 eptp)
 		return 5;
 
 	/* @eptp must be pre-validated by the caller. */
-	WARN_ON_ONCE(encoded_level != VMX_EPTP_PWL_4);
+	if (encoded_level != VMX_EPTP_PWL_4)
+		report_info("encoded_level %ld != VMX_EPTP_PWL_4", encoded_level);
+
 	return 4;
 }
 
diff --git a/x86/vmx.c b/x86/vmx.c
index c803eaa6..e79781f2 100644
--- a/x86/vmx.c
+++ b/x86/vmx.c
@@ -28,6 +28,8 @@
  * Author : Arthur Chunqi Li <yzt356@gmail.com>
  */
 
+#include <linux/vmx.h>
+
 #include "libcflat.h"
 #include "processor.h"
 #include "alloc_page.h"
@@ -83,7 +85,7 @@ static volatile u32 stage;
 
 static jmp_buf abort_target;
 
-struct vmcs_field {
+struct vmcs_field_struct {
 	u64 mask;
 	u64 encoding;
 };
@@ -91,7 +93,7 @@ struct vmcs_field {
 #define MASK(_bits) GENMASK_ULL((_bits) - 1, 0)
 #define MASK_NATURAL MASK(sizeof(unsigned long) * 8)
 
-static struct vmcs_field vmcs_fields[] = {
+static struct vmcs_field_struct vmcs_fields[] = {
 	{ MASK(16), VPID },
 	{ MASK(16), PINV },
 	{ MASK(16), EPTP_IDX },
@@ -250,12 +252,12 @@ enum vmcs_field_type {
 	VMCS_FIELD_TYPES,
 };
 
-static inline int vmcs_field_type(struct vmcs_field *f)
+static inline int vmcs_field_type(struct vmcs_field_struct *f)
 {
 	return (f->encoding >> VMCS_FIELD_TYPE_SHIFT) & 0x3;
 }
 
-static int vmcs_field_readonly(struct vmcs_field *f)
+static int vmcs_field_readonly(struct vmcs_field_struct *f)
 {
 	u64 ia32_vmx_misc;
 
@@ -264,7 +266,7 @@ static int vmcs_field_readonly(struct vmcs_field *f)
 		(vmcs_field_type(f) == VMCS_FIELD_TYPE_READ_ONLY_DATA);
 }
 
-static inline u64 vmcs_field_value(struct vmcs_field *f, u8 cookie)
+static inline u64 vmcs_field_value(struct vmcs_field_struct *f, u8 cookie)
 {
 	u64 value;
 
@@ -276,12 +278,12 @@ static inline u64 vmcs_field_value(struct vmcs_field *f, u8 cookie)
 	return value & f->mask;
 }
 
-static void set_vmcs_field(struct vmcs_field *f, u8 cookie)
+static void set_vmcs_field(struct vmcs_field_struct *f, u8 cookie)
 {
 	vmcs_write(f->encoding, vmcs_field_value(f, cookie));
 }
 
-static bool check_vmcs_field(struct vmcs_field *f, u8 cookie)
+static bool check_vmcs_field(struct vmcs_field_struct *f, u8 cookie)
 {
 	u64 expected;
 	u64 actual;
diff --git a/x86/vmx.h b/x86/vmx.h
index 9cd90488..41346252 100644
--- a/x86/vmx.h
+++ b/x86/vmx.h
@@ -204,7 +204,6 @@ enum Encoding {
 	GUEST_SEL_LDTR		= 0x080cul,
 	GUEST_SEL_TR		= 0x080eul,
 	GUEST_INT_STATUS	= 0x0810ul,
-	GUEST_PML_INDEX         = 0x0812ul,
 
 	/* 16-Bit Host State Fields */
 	HOST_SEL_ES		= 0x0c00ul,
@@ -216,28 +215,17 @@ enum Encoding {
 	HOST_SEL_TR		= 0x0c0cul,
 
 	/* 64-Bit Control Fields */
-	IO_BITMAP_A		= 0x2000ul,
-	IO_BITMAP_B		= 0x2002ul,
-	MSR_BITMAP		= 0x2004ul,
 	EXIT_MSR_ST_ADDR	= 0x2006ul,
 	EXIT_MSR_LD_ADDR	= 0x2008ul,
 	ENTER_MSR_LD_ADDR	= 0x200aul,
 	VMCS_EXEC_PTR		= 0x200cul,
-	TSC_OFFSET		= 0x2010ul,
 	TSC_OFFSET_HI		= 0x2011ul,
 	APIC_VIRT_ADDR		= 0x2012ul,
 	APIC_ACCS_ADDR		= 0x2014ul,
-	POSTED_INTR_DESC_ADDR	= 0x2016ul,
 	EPTP			= 0x201aul,
 	EPTP_HI			= 0x201bul,
-	VMREAD_BITMAP           = 0x2026ul,
 	VMREAD_BITMAP_HI        = 0x2027ul,
-	VMWRITE_BITMAP          = 0x2028ul,
 	VMWRITE_BITMAP_HI       = 0x2029ul,
-	EOI_EXIT_BITMAP0	= 0x201cul,
-	EOI_EXIT_BITMAP1	= 0x201eul,
-	EOI_EXIT_BITMAP2	= 0x2020ul,
-	EOI_EXIT_BITMAP3	= 0x2022ul,
 	PMLADDR                 = 0x200eul,
 	PMLADDR_HI              = 0x200ful,
 
@@ -254,7 +242,6 @@ enum Encoding {
 	GUEST_PAT		= 0x2804ul,
 	GUEST_PERF_GLOBAL_CTRL	= 0x2808ul,
 	GUEST_PDPTE		= 0x280aul,
-	GUEST_BNDCFGS		= 0x2812ul,
 
 	/* 64-Bit Host State */
 	HOST_PAT		= 0x2c00ul,
@@ -267,7 +254,6 @@ enum Encoding {
 	EXC_BITMAP		= 0x4004ul,
 	PF_ERROR_MASK		= 0x4006ul,
 	PF_ERROR_MATCH		= 0x4008ul,
-	CR3_TARGET_COUNT	= 0x400aul,
 	EXI_CONTROLS		= 0x400cul,
 	EXI_MSR_ST_CNT		= 0x400eul,
 	EXI_MSR_LD_CNT		= 0x4010ul,
@@ -276,7 +262,6 @@ enum Encoding {
 	ENT_INTR_INFO		= 0x4016ul,
 	ENT_INTR_ERROR		= 0x4018ul,
 	ENT_INST_LEN		= 0x401aul,
-	TPR_THRESHOLD		= 0x401cul,
 	CPU_EXEC_CTRL1		= 0x401eul,
 
 	/* 32-Bit R/O Data Fields */
@@ -311,7 +296,6 @@ enum Encoding {
 	GUEST_INTR_STATE	= 0x4824ul,
 	GUEST_ACTV_STATE	= 0x4826ul,
 	GUEST_SMBASE		= 0x4828ul,
-	GUEST_SYSENTER_CS	= 0x482aul,
 	PREEMPT_TIMER_VALUE	= 0x482eul,
 
 	/* 32-Bit Host State Fields */
@@ -320,8 +304,6 @@ enum Encoding {
 	/* Natural-Width Control Fields */
 	CR0_MASK		= 0x6000ul,
 	CR4_MASK		= 0x6002ul,
-	CR0_READ_SHADOW		= 0x6004ul,
-	CR4_READ_SHADOW		= 0x6006ul,
 	CR3_TARGET_0		= 0x6008ul,
 	CR3_TARGET_1		= 0x600aul,
 	CR3_TARGET_2		= 0x600cul,
@@ -333,12 +315,8 @@ enum Encoding {
 	IO_RSI			= 0x6404ul,
 	IO_RDI			= 0x6406ul,
 	IO_RIP			= 0x6408ul,
-	GUEST_LINEAR_ADDRESS	= 0x640aul,
 
 	/* Natural-Width Guest State Fields */
-	GUEST_CR0		= 0x6800ul,
-	GUEST_CR3		= 0x6802ul,
-	GUEST_CR4		= 0x6804ul,
 	GUEST_BASE_ES		= 0x6806ul,
 	GUEST_BASE_CS		= 0x6808ul,
 	GUEST_BASE_SS		= 0x680aul,
@@ -349,18 +327,9 @@ enum Encoding {
 	GUEST_BASE_TR		= 0x6814ul,
 	GUEST_BASE_GDTR		= 0x6816ul,
 	GUEST_BASE_IDTR		= 0x6818ul,
-	GUEST_DR7		= 0x681aul,
-	GUEST_RSP		= 0x681cul,
-	GUEST_RIP		= 0x681eul,
-	GUEST_RFLAGS		= 0x6820ul,
 	GUEST_PENDING_DEBUG	= 0x6822ul,
-	GUEST_SYSENTER_ESP	= 0x6824ul,
-	GUEST_SYSENTER_EIP	= 0x6826ul,
 
 	/* Natural-Width Host State Fields */
-	HOST_CR0		= 0x6c00ul,
-	HOST_CR3		= 0x6c02ul,
-	HOST_CR4		= 0x6c04ul,
 	HOST_BASE_FS		= 0x6c06ul,
 	HOST_BASE_GS		= 0x6c08ul,
 	HOST_BASE_TR		= 0x6c0aul,
@@ -368,8 +337,6 @@ enum Encoding {
 	HOST_BASE_IDTR		= 0x6c0eul,
 	HOST_SYSENTER_ESP	= 0x6c10ul,
 	HOST_SYSENTER_EIP	= 0x6c12ul,
-	HOST_RSP		= 0x6c14ul,
-	HOST_RIP		= 0x6c16ul
 };
 
 #define VMX_ENTRY_FAILURE	(1ul << 31)
@@ -528,61 +495,12 @@ enum Intr_type {
 
 #define INTR_INFO_INTR_TYPE_SHIFT       8
 
-#define INTR_TYPE_EXT_INTR              (0 << 8) /* external interrupt */
-#define INTR_TYPE_RESERVED              (1 << 8) /* reserved */
-#define INTR_TYPE_NMI_INTR		(2 << 8) /* NMI */
-#define INTR_TYPE_HARD_EXCEPTION	(3 << 8) /* processor exception */
-#define INTR_TYPE_SOFT_INTR             (4 << 8) /* software interrupt */
-#define INTR_TYPE_PRIV_SW_EXCEPTION	(5 << 8) /* priv. software exception */
-#define INTR_TYPE_SOFT_EXCEPTION	(6 << 8) /* software exception */
-#define INTR_TYPE_OTHER_EVENT           (7 << 8) /* other event */
-
 /*
  * Guest interruptibility state
  */
-#define GUEST_INTR_STATE_STI		(1 << 0)
 #define GUEST_INTR_STATE_MOVSS		(1 << 1)
-#define GUEST_INTR_STATE_SMI		(1 << 2)
-#define GUEST_INTR_STATE_NMI		(1 << 3)
 #define GUEST_INTR_STATE_ENCLAVE	(1 << 4)
 
-/*
- * VM-instruction error numbers
- */
-enum vm_instruction_error_number {
-	VMXERR_VMCALL_IN_VMX_ROOT_OPERATION = 1,
-	VMXERR_VMCLEAR_INVALID_ADDRESS = 2,
-	VMXERR_VMCLEAR_VMXON_POINTER = 3,
-	VMXERR_VMLAUNCH_NONCLEAR_VMCS = 4,
-	VMXERR_VMRESUME_NONLAUNCHED_VMCS = 5,
-	VMXERR_VMRESUME_AFTER_VMXOFF = 6,
-	VMXERR_ENTRY_INVALID_CONTROL_FIELD = 7,
-	VMXERR_ENTRY_INVALID_HOST_STATE_FIELD = 8,
-	VMXERR_VMPTRLD_INVALID_ADDRESS = 9,
-	VMXERR_VMPTRLD_VMXON_POINTER = 10,
-	VMXERR_VMPTRLD_INCORRECT_VMCS_REVISION_ID = 11,
-	VMXERR_UNSUPPORTED_VMCS_COMPONENT = 12,
-	VMXERR_VMWRITE_READ_ONLY_VMCS_COMPONENT = 13,
-	VMXERR_VMXON_IN_VMX_ROOT_OPERATION = 15,
-	VMXERR_ENTRY_INVALID_EXECUTIVE_VMCS_POINTER = 16,
-	VMXERR_ENTRY_NONLAUNCHED_EXECUTIVE_VMCS = 17,
-	VMXERR_ENTRY_EXECUTIVE_VMCS_POINTER_NOT_VMXON_POINTER = 18,
-	VMXERR_VMCALL_NONCLEAR_VMCS = 19,
-	VMXERR_VMCALL_INVALID_VM_EXIT_CONTROL_FIELDS = 20,
-	VMXERR_VMCALL_INCORRECT_MSEG_REVISION_ID = 22,
-	VMXERR_VMXOFF_UNDER_DUAL_MONITOR_TREATMENT_OF_SMIS_AND_SMM = 23,
-	VMXERR_VMCALL_INVALID_SMM_MONITOR_FEATURES = 24,
-	VMXERR_ENTRY_INVALID_VM_EXECUTION_CONTROL_FIELDS_IN_EXECUTIVE_VMCS = 25,
-	VMXERR_ENTRY_EVENTS_BLOCKED_BY_MOV_SS = 26,
-	VMXERR_INVALID_OPERAND_TO_INVEPT_INVVPID = 28,
-};
-
-enum vm_entry_failure_code {
-	ENTRY_FAIL_DEFAULT		= 0,
-	ENTRY_FAIL_PDPTE		= 2,
-	ENTRY_FAIL_NMI			= 3,
-	ENTRY_FAIL_VMCS_LINK_PTR	= 4,
-};
 
 #define SAVE_GPR				\
 	"xchg %rax, regs\n\t"			\
diff --git a/x86/vmx_tests.c b/x86/vmx_tests.c
index 0b3cfe50..dbcb6cae 100644
--- a/x86/vmx_tests.c
+++ b/x86/vmx_tests.c
@@ -5,6 +5,7 @@
  */
 
 #include <asm/debugreg.h>
+#include <linux/vmx.h>
 
 #include "vmx.h"
 #include "msr.h"
@@ -1962,11 +1963,6 @@ static int dbgctls_exit_handler(union exit_reason exit_reason)
 	return VMX_TEST_VMEXIT;
 }
 
-struct vmx_msr_entry {
-	u32 index;
-	u32 reserved;
-	u64 value;
-} __attribute__((packed));
 
 #define MSR_MAGIC 0x31415926
 struct vmx_msr_entry *exit_msr_store, *entry_msr_load, *exit_msr_load;
-- 
2.43.0