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Sat, 20 Sep 2025 13:39:11 -0700 (PDT) From: Andrew Jones To: iommu@lists.linux.dev, kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: jgg@nvidia.com, zong.li@sifive.com, tjeznach@rivosinc.com, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, anup@brainfault.org, atish.patra@linux.dev, tglx@linutronix.de, alex.williamson@redhat.com, paul.walmsley@sifive.com, palmer@dabbelt.com, alex@ghiti.fr Subject: [RFC PATCH v2 15/18] RISC-V: KVM: Add guest file irqbypass support Date: Sat, 20 Sep 2025 15:39:05 -0500 Message-ID: <20250920203851.2205115-35-ajones@ventanamicro.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250920203851.2205115-20-ajones@ventanamicro.com> References: <20250920203851.2205115-20-ajones@ventanamicro.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add all the functions needed to wire up irqbypass support and implement kvm_arch_update_irqfd_routing() which makes irq_set_vcpu_affinity() calls whenever the assigned device updates its target addresses. Also implement calls to irq_set_vcpu_affinity() from kvm_riscv_vcpu_aia_imsic_update() which are needed to update the IOMMU mappings when the hypervisor migrates a VCPU to another CPU (requiring a change to the target guest interrupt file). Signed-off-by: Andrew Jones --- arch/riscv/kvm/Kconfig | 1 + arch/riscv/kvm/aia_imsic.c | 143 ++++++++++++++++++++++++++++++++++++- arch/riscv/kvm/vm.c | 31 ++++++++ 3 files changed, 173 insertions(+), 2 deletions(-) diff --git a/arch/riscv/kvm/Kconfig b/arch/riscv/kvm/Kconfig index 968a33ab23b8..76cfd85c5c40 100644 --- a/arch/riscv/kvm/Kconfig +++ b/arch/riscv/kvm/Kconfig @@ -21,6 +21,7 @@ config KVM tristate "Kernel-based Virtual Machine (KVM) support" depends on RISCV_SBI && MMU select HAVE_KVM_IRQCHIP + select HAVE_KVM_IRQ_BYPASS select HAVE_KVM_IRQ_ROUTING select HAVE_KVM_MSI select HAVE_KVM_VCPU_ASYNC_IOCTL diff --git a/arch/riscv/kvm/aia_imsic.c b/arch/riscv/kvm/aia_imsic.c index fda0346f0ea1..148ae94fa17b 100644 --- a/arch/riscv/kvm/aia_imsic.c +++ b/arch/riscv/kvm/aia_imsic.c @@ -11,11 +11,13 @@ #include #include #include +#include #include #include #include #include #include +#include #include #define IMSIC_MAX_EIX (IMSIC_MAX_ID / BITS_PER_TYPE(u64)) @@ -719,6 +721,14 @@ void kvm_riscv_vcpu_aia_imsic_put(struct kvm_vcpu *vcpu) read_unlock_irqrestore(&imsic->vsfile_lock, flags); } +static u64 kvm_riscv_aia_msi_addr_mask(struct kvm_aia *aia) +{ + u64 group_mask = BIT(aia->nr_group_bits) - 1; + + return (group_mask << (aia->nr_group_shift - IMSIC_MMIO_PAGE_SHIFT)) | + (BIT(aia->nr_hart_bits + aia->nr_guest_bits) - 1); +} + void kvm_riscv_vcpu_aia_imsic_release(struct kvm_vcpu *vcpu) { unsigned long flags; @@ -769,6 +779,132 @@ void kvm_riscv_vcpu_aia_imsic_release(struct kvm_vcpu *vcpu) kvm_riscv_aia_free_hgei(old_vsfile_cpu, old_vsfile_hgei); } +void kvm_arch_update_irqfd_routing(struct kvm_kernel_irqfd *irqfd, + struct kvm_kernel_irq_routing_entry *old, + struct kvm_kernel_irq_routing_entry *new) +{ + struct riscv_iommu_ir_vcpu_info vcpu_info; + struct kvm *kvm = irqfd->kvm; + struct kvm_aia *aia = &kvm->arch.aia; + int host_irq = irqfd->producer->irq; + struct irq_data *irqdata = irq_get_irq_data(host_irq); + unsigned long tmp, flags; + struct kvm_vcpu *vcpu; + struct imsic *imsic; + struct msi_msg msg; + u64 msi_addr_mask; + gpa_t target; + int ret; + + if (old && old->type == KVM_IRQ_ROUTING_MSI && + new && new->type == KVM_IRQ_ROUTING_MSI && + !memcmp(&old->msi, &new->msi, sizeof(new->msi))) + return; + + if (!new) { + if (!WARN_ON_ONCE(!old) && old->type == KVM_IRQ_ROUTING_MSI) { + ret = irq_set_vcpu_affinity(host_irq, NULL); + WARN_ON_ONCE(ret && ret != -EOPNOTSUPP); + } + return; + } + + if (new->type != KVM_IRQ_ROUTING_MSI) + return; + + target = ((gpa_t)new->msi.address_hi << 32) | new->msi.address_lo; + if (WARN_ON_ONCE(target & (IMSIC_MMIO_PAGE_SZ - 1))) + return; + + msg = (struct msi_msg){ + .address_hi = new->msi.address_hi, + .address_lo = new->msi.address_lo, + .data = new->msi.data, + }; + + kvm_for_each_vcpu(tmp, vcpu, kvm) { + if (target == vcpu->arch.aia_context.imsic_addr) + break; + } + if (!vcpu) + return; + + msi_addr_mask = kvm_riscv_aia_msi_addr_mask(aia); + vcpu_info = (struct riscv_iommu_ir_vcpu_info){ + .gpa = target, + .msi_addr_mask = msi_addr_mask, + .msi_addr_pattern = (target >> IMSIC_MMIO_PAGE_SHIFT) & ~msi_addr_mask, + .group_index_bits = aia->nr_group_bits, + .group_index_shift = aia->nr_group_shift, + }; + + imsic = vcpu->arch.aia_context.imsic_state; + + read_lock_irqsave(&imsic->vsfile_lock, flags); + + if (WARN_ON_ONCE(imsic->vsfile_cpu < 0)) + goto out; + + vcpu_info.hpa = imsic->vsfile_pa; + + ret = irq_set_vcpu_affinity(host_irq, &vcpu_info); + WARN_ON_ONCE(ret && ret != -EOPNOTSUPP); + if (ret) + goto out; + + irq_data_get_irq_chip(irqdata)->irq_write_msi_msg(irqdata, &msg); + +out: + read_unlock_irqrestore(&imsic->vsfile_lock, flags); +} + +static void kvm_riscv_vcpu_irq_update(struct kvm_vcpu *vcpu) +{ + struct kvm *kvm = vcpu->kvm; + struct imsic *imsic = vcpu->arch.aia_context.imsic_state; + gpa_t gpa = vcpu->arch.aia_context.imsic_addr; + struct kvm_aia *aia = &kvm->arch.aia; + u64 msi_addr_mask = kvm_riscv_aia_msi_addr_mask(aia); + struct riscv_iommu_ir_vcpu_info vcpu_info = { + .gpa = gpa, + .hpa = imsic->vsfile_pa, + .msi_addr_mask = msi_addr_mask, + .msi_addr_pattern = (gpa >> IMSIC_MMIO_PAGE_SHIFT) & ~msi_addr_mask, + .group_index_bits = aia->nr_group_bits, + .group_index_shift = aia->nr_group_shift, + }; + struct kvm_kernel_irq_routing_entry *irq_entry; + struct kvm_kernel_irqfd *irqfd; + gpa_t target; + int host_irq, ret; + + spin_lock_irq(&kvm->irqfds.lock); + + list_for_each_entry(irqfd, &kvm->irqfds.items, list) { + if (!irqfd->producer) + continue; + + irq_entry = &irqfd->irq_entry; + if (irq_entry->type != KVM_IRQ_ROUTING_MSI) + continue; + + target = ((gpa_t)irq_entry->msi.address_hi << 32) | irq_entry->msi.address_lo; + if (WARN_ON_ONCE(target & (IMSIC_MMIO_PAGE_SZ - 1))) + continue; + + if (target != gpa) + continue; + + host_irq = irqfd->producer->irq; + ret = irq_set_vcpu_affinity(host_irq, &vcpu_info); + WARN_ON_ONCE(ret && ret != -EOPNOTSUPP); + if (ret == -EOPNOTSUPP) + break; + } + + spin_unlock_irq(&kvm->irqfds.lock); +} + int kvm_riscv_vcpu_aia_imsic_update(struct kvm_vcpu *vcpu) { unsigned long flags; @@ -836,14 +972,17 @@ int kvm_riscv_vcpu_aia_imsic_update(struct kvm_vcpu *vcpu) if (ret) goto fail_free_vsfile_hgei; - /* TODO: Update the IOMMU mapping ??? */ - /* Update new IMSIC VS-file details in IMSIC context */ write_lock_irqsave(&imsic->vsfile_lock, flags); + imsic->vsfile_hgei = new_vsfile_hgei; imsic->vsfile_cpu = vcpu->cpu; imsic->vsfile_va = new_vsfile_va; imsic->vsfile_pa = new_vsfile_pa; + + /* Update the IOMMU mapping */ + kvm_riscv_vcpu_irq_update(vcpu); + write_unlock_irqrestore(&imsic->vsfile_lock, flags); /* diff --git a/arch/riscv/kvm/vm.c b/arch/riscv/kvm/vm.c index 66d91ae6e9b2..1d33cff73e00 100644 --- a/arch/riscv/kvm/vm.c +++ b/arch/riscv/kvm/vm.c @@ -11,6 +11,8 @@ #include #include #include +#include +#include #include const struct _kvm_stats_desc kvm_vm_stats_desc[] = { @@ -56,6 +58,35 @@ void kvm_arch_destroy_vm(struct kvm *kvm) kvm_riscv_aia_destroy_vm(kvm); } +bool kvm_arch_has_irq_bypass(void) +{ + return true; +} + +int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons, + struct irq_bypass_producer *prod) +{ + struct kvm_kernel_irqfd *irqfd = + container_of(cons, struct kvm_kernel_irqfd, consumer); + + irqfd->producer = prod; + kvm_arch_update_irqfd_routing(irqfd, NULL, &irqfd->irq_entry); + + return 0; +} + +void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons, + struct irq_bypass_producer *prod) +{ + struct kvm_kernel_irqfd *irqfd = + container_of(cons, struct kvm_kernel_irqfd, consumer); + + WARN_ON(irqfd->producer != prod); + + kvm_arch_update_irqfd_routing(irqfd, &irqfd->irq_entry, NULL); + irqfd->producer = NULL; +} + int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irql, bool line_status) { -- 2.49.0