Re: [PATCH] RISC-V: KVM: Transparent huge page support

[kernel test robot <lkp@intel.com>]

Hi,

kernel test robot noticed the following build warnings:

[auto build test WARNING on kvm/queue]
[also build test WARNING on kvm/next mst-vhost/linux-next linus/master v6.17-rc7 next-20250926]
[cannot apply to kvm/linux-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/liu-xuemei1-zte-com-cn/RISC-V-KVM-Transparent-huge-page-support/20250928-154904
base:   https://git.kernel.org/pub/scm/virt/kvm/kvm.git queue
patch link:    https://lore.kernel.org/r/20250928154450701hRC3fm00QYFnGiM0_M1No%40zte.com.cn
patch subject: [PATCH] RISC-V: KVM: Transparent huge page support
config: riscv-randconfig-001-20250928 (https://download.01.org/0day-ci/archive/20250928/202509282326.NFfcoD5h-lkp@intel.com/config)
compiler: riscv64-linux-gcc (GCC) 11.5.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250928/202509282326.NFfcoD5h-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202509282326.NFfcoD5h-lkp@intel.com/

All warnings (new ones prefixed by >>):

   arch/riscv/kvm/gstage.c: In function 'gstage_supports_huge_mapping':
>> arch/riscv/kvm/gstage.c:108:39: warning: left shift count >= width of type [-Wshift-count-overflow]
     108 |         gpa_start = memslot->base_gfn << PAGE_SIZE;
         |                                       ^~


vim +108 arch/riscv/kvm/gstage.c

    97	
    98	static bool gstage_supports_huge_mapping(struct kvm_memory_slot *memslot, unsigned long hva)
    99	{
   100		gpa_t gpa_start;
   101		hva_t uaddr_start, uaddr_end;
   102		size_t size;
   103	
   104		size = memslot->npages * PAGE_SIZE;
   105		uaddr_start = memslot->userspace_addr;
   106		uaddr_end = uaddr_start + size;
   107	
 > 108		gpa_start = memslot->base_gfn << PAGE_SIZE;
   109	
   110		/*
   111		 * Pages belonging to memslots that don't have the same alignment
   112		 * within a PMD for userspace and GPA cannot be mapped with g-stage
   113		 * PMD entries, because we'll end up mapping the wrong pages.
   114		 *
   115		 * Consider a layout like the following:
   116		 *
   117		 *    memslot->userspace_addr:
   118		 *    +-----+--------------------+--------------------+---+
   119		 *    |abcde|fgh  vs-stage block  |    vs-stage block tv|xyz|
   120		 *    +-----+--------------------+--------------------+---+
   121		 *
   122		 *    memslot->base_gfn << PAGE_SHIFT:
   123		 *      +---+--------------------+--------------------+-----+
   124		 *      |abc|def  g-stage block  |    g-stage block   |tvxyz|
   125		 *      +---+--------------------+--------------------+-----+
   126		 *
   127		 * If we create those g-stage blocks, we'll end up with this incorrect
   128		 * mapping:
   129		 *   d -> f
   130		 *   e -> g
   131		 *   f -> h
   132		 */
   133		if ((gpa_start & (PMD_SIZE - 1)) != (uaddr_start & (PMD_SIZE - 1)))
   134			return false;
   135	
   136		/*
   137		 * Next, let's make sure we're not trying to map anything not covered
   138		 * by the memslot. This means we have to prohibit block size mappings
   139		 * for the beginning and end of a non-block aligned and non-block sized
   140		 * memory slot (illustrated by the head and tail parts of the
   141		 * userspace view above containing pages 'abcde' and 'xyz',
   142		 * respectively).
   143		 *
   144		 * Note that it doesn't matter if we do the check using the
   145		 * userspace_addr or the base_gfn, as both are equally aligned (per
   146		 * the check above) and equally sized.
   147		 */
   148		return (hva >= ALIGN(uaddr_start, PMD_SIZE)) && (hva < ALIGN_DOWN(uaddr_end, PMD_SIZE));
   149	}
   150	

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