From: John Allen <john.allen@amd.com>
To: <kvm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<x86@kernel.org>, <seanjc@google.com>, <pbonzini@redhat.com>,
<dave.hansen@intel.com>
Cc: <rick.p.edgecombe@intel.com>, <mlevitsk@redhat.com>,
<weijiang.yang@intel.com>, <chao.gao@intel.com>, <bp@alien8.de>,
<dave.hansen@linux.intel.com>, <hpa@zytor.com>,
<mingo@redhat.com>, <tglx@linutronix.de>,
<thomas.lendacky@amd.com>, John Allen <john.allen@amd.com>
Subject: [PATCH v4 0/2] Support for SEV-ES guest shadow stack
Date: Tue, 14 Oct 2025 19:43:45 +0000 [thread overview]
Message-ID: <20251014194347.2374-1-john.allen@amd.com> (raw)
For shadow stack support in SVM when using SEV-ES, the guest kernel
needs to save XSS to the GHCB in order for the hypervisor to determine
the XSAVES save area size.
---
v4:
- Use CPUID_LEAF_XSTATE instead of open coding 0xd.
v3:
- Only CPUID.0xD.1 consumes XSS. Limit including XSS in GHCB for this
case.
v2:
- Update changelog for patch 2/2
John Allen (2):
x86/boot: Move boot_*msr helpers to asm/shared/msr.h
x86/sev-es: Include XSS value in GHCB CPUID request
arch/x86/boot/compressed/sev.c | 7 ++++---
arch/x86/boot/compressed/sev.h | 6 +++---
arch/x86/boot/cpucheck.c | 16 ++++++++--------
arch/x86/boot/msr.h | 26 --------------------------
arch/x86/coco/sev/vc-shared.c | 13 +++++++++++++
arch/x86/include/asm/shared/msr.h | 15 +++++++++++++++
arch/x86/include/asm/svm.h | 1 +
7 files changed, 44 insertions(+), 40 deletions(-)
delete mode 100644 arch/x86/boot/msr.h
--
2.47.3
next reply other threads:[~2025-10-14 19:44 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-14 19:43 John Allen [this message]
2025-10-14 19:43 ` [PATCH v4 1/2] x86/boot: Move boot_*msr helpers to asm/shared/msr.h John Allen
2025-10-14 19:43 ` [PATCH v4 2/2] x86/sev-es: Include XSS value in GHCB CPUID request John Allen
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