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From: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
To: Jim Mattson <jmattson@google.com>
Cc: Sean Christopherson <seanjc@google.com>,
	Brendan Jackman <jackmanb@google.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 1/4] KVM: VMX: Flush CPU buffers as needed if L1D cache flush is skipped
Date: Mon, 27 Oct 2025 16:17:21 -0700	[thread overview]
Message-ID: <20251027231721.irprdsyqd2klt4bf@desk> (raw)
In-Reply-To: <CALMp9eRpP0LvMJ=aYf45xxz1fRrx5Sf9ZrqRE8yKRcMX-+f4+A@mail.gmail.com>

On Mon, Oct 27, 2025 at 03:03:23PM -0700, Jim Mattson wrote:
> On Tue, Oct 21, 2025 at 6:20 PM Pawan Gupta
> <pawan.kumar.gupta@linux.intel.com> wrote:
> >
> > ...
> > Thinking more on this, the software sequence is only invoked when the
> > system doesn't have the L1D flushing feature added by a microcode update.
> > In such a case system is not expected to have a flushing VERW either, which
> > was introduced after L1TF. Also, the admin needs to have a very good reason
> > for not updating the microcode for 5+ years :-)
> 
> KVM started reporting MD_CLEAR to userspace in Linux v5.2, but it
> didn't report L1D_FLUSH to userspace until Linux v6.4, so there are
> plenty of virtual CPUs with a flushing VERW that don't have the L1D
> flushing feature.

Shouldn't only the L0 hypervisor be doing the L1D_FLUSH?

kvm_get_arch_capabilities()
{
...
        /*
         * If we're doing cache flushes (either "always" or "cond")
         * we will do one whenever the guest does a vmlaunch/vmresume.
         * If an outer hypervisor is doing the cache flush for us
         * (ARCH_CAP_SKIP_VMENTRY_L1DFLUSH), we can safely pass that
         * capability to the guest too, and if EPT is disabled we're not
         * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
         * require a nested hypervisor to do a flush of its own.
         */
        if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
                data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;


  reply	other threads:[~2025-10-27 23:17 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-16 20:04 [PATCH v3 0/4] KVM: VMX: Unify L1D flush for L1TF Sean Christopherson
2025-10-16 20:04 ` [PATCH v3 1/4] KVM: VMX: Flush CPU buffers as needed if L1D cache flush is skipped Sean Christopherson
2025-10-21 13:34   ` Brendan Jackman
2025-10-21 16:48     ` Sean Christopherson
2025-10-21 23:30       ` Pawan Gupta
2025-10-22  1:20         ` Pawan Gupta
2025-10-27 22:03           ` Jim Mattson
2025-10-27 23:17             ` Pawan Gupta [this message]
2025-10-27 23:58               ` Jim Mattson
2025-10-28  0:19                 ` Pawan Gupta
2025-10-28  0:49                   ` Pawan Gupta
2025-10-27 21:09         ` Pawan Gupta
2025-10-21 23:18   ` Pawan Gupta
2025-10-22  1:59     ` Brendan Jackman
2025-10-22 15:04       ` Sean Christopherson
2025-10-16 20:04 ` [PATCH v3 2/4] KVM: VMX: Bundle all L1 data cache flush mitigation code together Sean Christopherson
2025-10-21 13:38   ` Brendan Jackman
2025-10-16 20:04 ` [PATCH v3 3/4] KVM: VMX: Disable L1TF L1 data cache flush if CONFIG_CPU_MITIGATIONS=n Sean Christopherson
2025-10-22  1:36   ` Pawan Gupta
2025-10-22 15:06     ` Sean Christopherson
2025-10-16 20:04 ` [PATCH v3 4/4] KVM: x86: Unify L1TF flushing under per-CPU variable Sean Christopherson
2025-10-22  1:59   ` Pawan Gupta

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