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Wed, 5 Nov 2025 17:32:34 -0500 (EST) Date: Wed, 5 Nov 2025 15:32:33 -0700 From: Alex Williamson To: Longfang Liu Cc: , , , , , , , Subject: Re: [PATCH v12 2/2] hisi_acc_vfio_pci: adapt to new migration configuration Message-ID: <20251105153233.59a504ae.alex@shazbot.org> In-Reply-To: <20251030015744.131771-3-liulongfang@huawei.com> References: <20251030015744.131771-1-liulongfang@huawei.com> <20251030015744.131771-3-liulongfang@huawei.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Thu, 30 Oct 2025 09:57:44 +0800 Longfang Liu wrote: > diff --git a/drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.h b/drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.h > index 91002ceeebc1..419a378c3d1d 100644 > --- a/drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.h > +++ b/drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.h > @@ -50,8 +50,10 @@ > #define QM_QUE_ISO_CFG_V 0x0030 > #define QM_PAGE_SIZE 0x0034 > > -#define QM_EQC_DW0 0X8000 > -#define QM_AEQC_DW0 0X8020 > +#define QM_EQC_VF_DW0 0X8000 > +#define QM_AEQC_VF_DW0 0X8020 > +#define QM_EQC_PF_DW0 0x1c00 > +#define QM_AEQC_PF_DW0 0x1c20 > > #define ACC_DRV_MAJOR_VER 1 > #define ACC_DRV_MINOR_VER 0 > @@ -59,6 +61,22 @@ > #define ACC_DEV_MAGIC_V1 0XCDCDCDCDFEEDAACC > #define ACC_DEV_MAGIC_V2 0xAACCFEEDDECADEDE > > +#define QM_MIG_REGION_OFFSET 0x180000 > +#define QM_MIG_REGION_SIZE 0x2000 > + > +/** > + * On HW_ACC_MIG_VF_CTRL mode, the configuration domain supporting live > + * migration functionality is located in the latter 32KB of the VF's BAR2. > + * The Guest is only provided with the first 32KB of the VF's BAR2. > + * On HW_ACC_MIG_PF_CTRL mode, the configuration domain supporting live > + * migration functionality is located in the PF's BAR2, and the entire 64KB > + * of the VF's BAR2 is allocated to the Guest. > + */ > +enum hw_drv_mode { > + HW_ACC_MIG_VF_CTRL = 0, > + HW_ACC_MIG_PF_CTRL, > +}; > + > struct acc_vf_data { > #define QM_MATCH_SIZE offsetofend(struct acc_vf_data, qm_rsv_state) > /* QM match information */ > @@ -125,6 +143,7 @@ struct hisi_acc_vf_core_device { > struct pci_dev *vf_dev; > struct hisi_qm *pf_qm; > struct hisi_qm vf_qm; > + int drv_mode; I can fix this on commit rather than send a new version, but is there any reason we wouldn't make use of the enum here: enum hw_drv_mode drv_mode; ? Thanks, Alex > /* > * vf_qm_state represents the QM_VF_STATE register value. > * It is set by Guest driver for the ACC VF dev indicating