From: Luigi Rizzo <lrizzo@google.com>
To: jacob.jun.pan@linux.intel.com, lrizzo@google.com,
rizzo.unipi@gmail.com, seanjc@google.com, tglx@linutronix.de
Cc: a.manzanares@samsung.com, acme@kernel.org, ashok.raj@intel.com,
axboe@kernel.dk, baolu.lu@linux.intel.com, bp@alien8.de,
dan.j.williams@intel.com, dave.hansen@intel.com,
guang.zeng@intel.com, helgaas@kernel.org, hpa@zytor.com,
iommu@lists.linux.dev, jim.harris@samsung.com, joro@8bytes.org,
kevin.tian@intel.com, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org, maz@kernel.org, mingo@redhat.com,
oliver.sang@intel.com, paul.e.luse@intel.com,
peterz@infradead.org, robert.hoo.linux@gmail.com,
robin.murphy@arm.com, x86@kernel.org
Subject: Re: [PATCH v3 00/12] Coalesced Interrupt Delivery with posted MSI
Date: Mon, 24 Nov 2025 10:48:36 +0000 [thread overview]
Message-ID: <20251124104836.3685533-1-lrizzo@google.com> (raw)
In-Reply-To: <20240423174114.526704-1-jacob.jun.pan@linux.intel.com>
I think there is an inherent race condition when intremap=posted_msi
and the IRQ subsystem resends pending interrupts via __apic_send_IPI().
In detail:
intremap=posted_msi does not process vectors for which the
corresponding bit in the PIR register is set.
Now say that, for whatever reason, the IRQ infrastructure intercepts
an interrupt marking it as PENDING. . handle_edge_irq() and many other
places in kernel/irq have sections of code like this:
if (!irq_may_run(desc)) {
desc->istate |= IRQS_PENDING;
mask_ack_irq(desc);
goto out_unlock;
}
Then eventually check_irq_resend() will try to resend pending interrupts
desc->istate &= ~IRQS_PENDING;
if (!try_retrigger(desc))
err = irq_sw_resend(desc);
try_retrigger() on x86 eventually calls apic_retrigger_irq() which
uses __apic_send_IPI(). Unfortunately the latter does not seem to
set the 'vector' bit in the PIR (nor sends the POSTED_MSI interrupt)
thus potentially causing a lost interrupt unless there is some other
spontaneous interrupt coming from the device.
I could verify the stall (forcing the path that sets IRQS_PENDING),
and could verify that the patch below fixes the problem
static int apic_retrigger_irq(struct irq_data *irqd)
{
struct apic_chip_data *apicd = apic_chip_data(irqd);
unsigned long flags;
+ uint vec;
raw_spin_lock_irqsave(&vector_lock, flags);
+ vec = apicd->vector;
+ if (posted_msi_supported() &&
+ vec >= FIRST_EXTERNAL_VECTOR && vec < FIRST_SYSTEM_VECTOR) {
+ struct pi_desc *pid = per_cpu_ptr(&posted_msi_pi_desc, apicd->cpu);
+ set_bit(vec, (unsigned long *)pid->pir64);
+ __apic_send_IPI(apicd->cpu, POSTED_MSI_NOTIFICATION_VECTOR);
+ } else {
__apic_send_IPI(apicd->cpu, apicd->vector);
+ }
raw_spin_unlock_irqrestore(&vector_lock, flags);
return 1;
}
Am I missing something ? any better fix ?
cheers
luigi
next prev parent reply other threads:[~2025-11-24 10:48 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-23 17:41 [PATCH v3 00/12] Coalesced Interrupt Delivery with posted MSI Jacob Pan
2024-04-23 17:41 ` [PATCH v3 01/12] KVM: VMX: Move posted interrupt descriptor out of vmx code Jacob Pan
2024-04-23 17:41 ` [PATCH v3 02/12] x86/irq: Unionize PID.PIR for 64bit access w/o casting Jacob Pan
2024-04-23 17:41 ` [PATCH v3 03/12] x86/irq: Remove bitfields in posted interrupt descriptor Jacob Pan
2024-05-01 7:29 ` Oliver Sang
2024-04-23 17:41 ` [PATCH v3 04/12] x86/irq: Add a Kconfig option for posted MSI Jacob Pan
2024-04-23 17:41 ` [PATCH v3 05/12] x86/irq: Reserve a per CPU IDT vector for posted MSIs Jacob Pan
2024-04-23 17:41 ` [PATCH v3 06/12] x86/irq: Set up per host CPU posted interrupt descriptors Jacob Pan
2024-04-23 17:41 ` [PATCH v3 07/12] x86/irq: Factor out calling ISR from common_interrupt Jacob Pan
2024-04-23 17:41 ` [PATCH v3 08/12] x86/irq: Install posted MSI notification handler Jacob Pan
2024-04-23 17:41 ` [PATCH v3 09/12] x86/irq: Factor out common code for checking pending interrupts Jacob Pan
2024-04-23 17:41 ` [PATCH v3 10/12] x86/irq: Extend checks for pending vectors to posted interrupts Jacob Pan
2024-04-23 17:41 ` [PATCH v3 11/12] iommu/vt-d: Make posted MSI an opt-in cmdline option Jacob Pan
2024-04-23 17:41 ` [PATCH v3 12/12] iommu/vt-d: Enable posted mode for device MSIs Jacob Pan
2025-11-24 10:48 ` Luigi Rizzo [this message]
2025-11-24 18:59 ` [PATCH v3 00/12] Coalesced Interrupt Delivery with posted MSI Thomas Gleixner
2025-11-24 22:40 ` Luigi Rizzo
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