From: Jonathan Cameron <jonathan.cameron@huawei.com>
To: Xu Yilun <yilun.xu@linux.intel.com>
Cc: <linux-coco@lists.linux.dev>, <linux-pci@vger.kernel.org>,
<chao.gao@intel.com>, <dave.jiang@intel.com>,
<baolu.lu@linux.intel.com>, <yilun.xu@intel.com>,
<zhenzhong.duan@intel.com>, <kvm@vger.kernel.org>,
<rick.p.edgecombe@intel.com>, <dave.hansen@linux.intel.com>,
<dan.j.williams@intel.com>, <kas@kernel.org>, <x86@kernel.org>
Subject: Re: [PATCH v1 12/26] iommu/vt-d: Reserve the MSB domain ID bit for the TDX module
Date: Fri, 19 Dec 2025 11:51:15 +0000 [thread overview]
Message-ID: <20251219115115.00000922@huawei.com> (raw)
In-Reply-To: <20251117022311.2443900-13-yilun.xu@linux.intel.com>
On Mon, 17 Nov 2025 10:22:56 +0800
Xu Yilun <yilun.xu@linux.intel.com> wrote:
> From: Lu Baolu <baolu.lu@linux.intel.com>
>
> The Intel TDX Connect Architecture Specification defines some enhancements
> for the VT-d architecture to introduce IOMMU support for TEE-IO requests.
> Section 2.2, 'Trusted DMA' states that:
>
> "I/O TLB and DID Isolation – When IOMMU is enabled to support TDX
> Connect, the IOMMU restricts the VMM’s DID setting, reserving the MSB bit
> for the TDX module. The TDX module always sets this reserved bit on the
> trusted DMA table. IOMMU tags IOTLB, PASID cache, and context entries to
> indicate whether they were created from TEE-IO transactions, ensuring
> isolation between TEE and non-TEE requests in translation caches."
>
> Reserve the MSB in the domain ID for the TDX module's use if the
> enhancement is required, which is detected if the ECAP.TDXCS bit in the
> VT-d extended capability register is set and the TVM Usable field of the
> ACPI KEYP table is set.
>
> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Hi,
One comment inline.
Thanks,
Jonathan
> diff --git a/drivers/iommu/intel/dmar.c b/drivers/iommu/intel/dmar.c
> index a54934c0536f..e9d65b26ad64 100644
> --- a/drivers/iommu/intel/dmar.c
> +++ b/drivers/iommu/intel/dmar.c
> @@ -1033,6 +1033,56 @@ static int map_iommu(struct intel_iommu *iommu, struct dmar_drhd_unit *drhd)
> return err;
> }
>
> +static int keyp_config_unit_tvm_usable(union acpi_subtable_headers *header,
> + void *arg, const unsigned long end)
> +{
> + struct acpi_keyp_config_unit *acpi_cu =
> + (struct acpi_keyp_config_unit *)&header->keyp;
> + int *tvm_usable = arg;
> +
> + if (acpi_cu->flags & ACPI_KEYP_F_TVM_USABLE)
> + *tvm_usable = true;
As below. Be consistent on int vs bool as otherwise the subtle use of -1 is very confusing.
> +
> + return 0;
> +}
> +
> +static bool platform_is_tdxc_enhanced(void)
> +{
> + static int tvm_usable = -1;
> + int ret;
> +
> + /* only need to parse once */
> + if (tvm_usable != -1)
> + return tvm_usable;
> +
> + tvm_usable = false;
This is flipping between an int and a bool which seems odd.
I'd stick to an integer then make it a bool only at return.
> + ret = acpi_table_parse_keyp(ACPI_KEYP_TYPE_CONFIG_UNIT,
> + keyp_config_unit_tvm_usable, &tvm_usable);
> + if (ret < 0)
> + tvm_usable = false;
> +
> + return tvm_usable;
> +}
WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Cameron <jonathan.cameron@huawei.com>
To: Xu Yilun <yilun.xu@linux.intel.com>
Cc: <linux-coco@lists.linux.dev>, <linux-pci@vger.kernel.org>,
<chao.gao@intel.com>, <dave.jiang@intel.com>,
<baolu.lu@linux.intel.com>, <yilun.xu@intel.com>,
<zhenzhong.duan@intel.com>, <kvm@vger.kernel.org>,
<rick.p.edgecombe@intel.com>, <dave.hansen@linux.intel.com>,
<dan.j.williams@intel.com>, <kas@kernel.org>, <x86@kernel.org>
Subject: Re: [PATCH v1 12/26] iommu/vt-d: Reserve the MSB domain ID bit for the TDX module
Date: Fri, 19 Dec 2025 11:52:07 +0000 [thread overview]
Message-ID: <20251219115115.00000922@huawei.com> (raw)
Message-ID: <20251219115207.y-DfcrKLnB42UJC-JTjKZhl2TUsg0JdD_fUTahh7q94@z> (raw)
In-Reply-To: <20251117022311.2443900-13-yilun.xu@linux.intel.com>
On Mon, 17 Nov 2025 10:22:56 +0800
Xu Yilun <yilun.xu@linux.intel.com> wrote:
> From: Lu Baolu <baolu.lu@linux.intel.com>
>
> The Intel TDX Connect Architecture Specification defines some enhancements
> for the VT-d architecture to introduce IOMMU support for TEE-IO requests.
> Section 2.2, 'Trusted DMA' states that:
>
> "I/O TLB and DID Isolation – When IOMMU is enabled to support TDX
> Connect, the IOMMU restricts the VMM’s DID setting, reserving the MSB bit
> for the TDX module. The TDX module always sets this reserved bit on the
> trusted DMA table. IOMMU tags IOTLB, PASID cache, and context entries to
> indicate whether they were created from TEE-IO transactions, ensuring
> isolation between TEE and non-TEE requests in translation caches."
>
> Reserve the MSB in the domain ID for the TDX module's use if the
> enhancement is required, which is detected if the ECAP.TDXCS bit in the
> VT-d extended capability register is set and the TVM Usable field of the
> ACPI KEYP table is set.
>
> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Missing sign off of the person who 'handled' the patch by sending it to
the list in this series. i.e. Xu Yilun.
One comment inline.
Thanks,
Jonathan
> diff --git a/drivers/iommu/intel/dmar.c b/drivers/iommu/intel/dmar.c
> index a54934c0536f..e9d65b26ad64 100644
> --- a/drivers/iommu/intel/dmar.c
> +++ b/drivers/iommu/intel/dmar.c
> @@ -1033,6 +1033,56 @@ static int map_iommu(struct intel_iommu *iommu, struct dmar_drhd_unit *drhd)
> return err;
> }
>
> +static int keyp_config_unit_tvm_usable(union acpi_subtable_headers *header,
> + void *arg, const unsigned long end)
> +{
> + struct acpi_keyp_config_unit *acpi_cu =
> + (struct acpi_keyp_config_unit *)&header->keyp;
> + int *tvm_usable = arg;
> +
> + if (acpi_cu->flags & ACPI_KEYP_F_TVM_USABLE)
> + *tvm_usable = true;
As below. Be consistent on int vs bool as otherwise the subtle use of -1 is very confusing.
> +
> + return 0;
> +}
> +
> +static bool platform_is_tdxc_enhanced(void)
> +{
> + static int tvm_usable = -1;
> + int ret;
> +
> + /* only need to parse once */
> + if (tvm_usable != -1)
> + return tvm_usable;
> +
> + tvm_usable = false;
This is flipping between an int and a bool which seems odd.
I'd stick to an integer then make it a bool only at return.
> + ret = acpi_table_parse_keyp(ACPI_KEYP_TYPE_CONFIG_UNIT,
> + keyp_config_unit_tvm_usable, &tvm_usable);
> + if (ret < 0)
> + tvm_usable = false;
> +
> + return tvm_usable;
> +}
next prev parent reply other threads:[~2025-12-19 11:51 UTC|newest]
Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-17 2:22 [PATCH v1 00/26] PCI/TSM: TDX Connect: SPDM Session and IDE Establishment Xu Yilun
2025-11-17 2:22 ` [PATCH v1 01/26] coco/tdx-host: Introduce a "tdx_host" device Xu Yilun
2025-12-19 11:19 ` Jonathan Cameron
2025-11-17 2:22 ` [PATCH v1 02/26] x86/virt/tdx: Move bit definitions of TDX_FEATURES0 to public header Xu Yilun
2025-11-17 2:22 ` [PATCH v1 03/26] coco/tdx-host: Support Link TSM for TDX host Xu Yilun
2025-12-19 11:18 ` Jonathan Cameron
2025-11-17 2:22 ` [PATCH v1 04/26] x86/tdx: Move all TDX error defines into <asm/shared/tdx_errno.h> Xu Yilun
2025-11-17 2:22 ` [PATCH v1 05/26] mm: Add __free() support for __free_page() Xu Yilun
2025-12-19 11:22 ` Jonathan Cameron
2025-12-23 9:41 ` Xu Yilun
2025-11-17 2:22 ` [PATCH v1 06/26] x86/virt/tdx: Add tdx_page_array helpers for new TDX Module objects Xu Yilun
2025-11-17 16:41 ` Dave Hansen
2025-11-18 12:47 ` Xu Yilun
2026-02-11 16:24 ` dan.j.williams
2025-11-18 19:09 ` Dave Hansen
2025-11-19 16:20 ` dan.j.williams
2025-11-19 18:05 ` Dave Hansen
2025-11-19 19:10 ` dan.j.williams
2025-11-20 8:34 ` Xu Yilun
2025-11-20 6:28 ` Xu Yilun
2025-12-19 11:32 ` Jonathan Cameron
2025-12-23 10:07 ` Xu Yilun
2026-02-17 7:37 ` Tony Lindgren
2025-11-17 2:22 ` [PATCH v1 07/26] x86/virt/tdx: Read TDX global metadata for TDX Module Extensions Xu Yilun
2025-11-17 16:52 ` Dave Hansen
2025-11-18 13:00 ` Xu Yilun
2025-11-17 2:22 ` [PATCH v1 08/26] x86/virt/tdx: Add tdx_enable_ext() to enable of " Xu Yilun
2025-11-17 17:34 ` Dave Hansen
2025-11-18 17:14 ` Xu Yilun
2025-11-18 18:32 ` Dave Hansen
2025-11-20 6:09 ` Xu Yilun
2025-11-20 15:23 ` Dave Hansen
2025-11-20 18:00 ` dan.j.williams
2025-11-21 12:54 ` Xu Yilun
2025-11-21 15:15 ` Dave Hansen
2025-11-21 15:38 ` Dave Hansen
2025-11-24 10:41 ` Xu Yilun
2025-11-24 10:52 ` Xu Yilun
2025-12-08 10:02 ` Xu Yilun
2025-11-17 2:22 ` [PATCH v1 09/26] ACPICA: Add KEYP table definition Xu Yilun
2025-11-17 2:22 ` [PATCH v1 10/26] acpi: Add KEYP support to fw_table parsing Xu Yilun
2025-12-19 11:44 ` Jonathan Cameron
2025-11-17 2:22 ` [PATCH v1 11/26] iommu/vt-d: Cache max domain ID to avoid redundant calculation Xu Yilun
2025-12-19 11:53 ` Jonathan Cameron
2025-12-23 10:09 ` Xu Yilun
2025-11-17 2:22 ` [PATCH v1 12/26] iommu/vt-d: Reserve the MSB domain ID bit for the TDX module Xu Yilun
2025-12-19 11:51 ` Jonathan Cameron [this message]
2025-12-19 11:52 ` Jonathan Cameron
2025-12-23 10:39 ` Xu Yilun
2025-11-17 2:22 ` [PATCH v1 13/26] x86/virt/tdx: Read TDX Connect global metadata for TDX Connect Xu Yilun
2025-11-17 2:22 ` [PATCH v1 14/26] mm: Add __free() support for folio_put() Xu Yilun
2025-12-19 11:55 ` Jonathan Cameron
2025-12-23 10:44 ` Xu Yilun
2025-11-17 2:22 ` [PATCH v1 15/26] x86/virt/tdx: Extend tdx_page_array to support IOMMU_MT Xu Yilun
2025-11-17 19:19 ` Dave Hansen
2025-11-17 2:23 ` [PATCH v1 16/26] x86/virt/tdx: Add a helper to loop on TDX_INTERRUPTED_RESUMABLE Xu Yilun
2025-11-17 2:23 ` [PATCH v1 17/26] x86/virt/tdx: Add SEAMCALL wrappers for trusted IOMMU setup and clear Xu Yilun
2025-11-17 2:23 ` [PATCH v1 18/26] iommu/vt-d: Export a helper to do function for each dmar_drhd_unit Xu Yilun
2025-11-17 2:23 ` [PATCH v1 19/26] coco/tdx-host: Setup all trusted IOMMUs on TDX Connect init Xu Yilun
2025-11-17 2:23 ` [PATCH v1 20/26] coco/tdx-host: Add a helper to exchange SPDM messages through DOE Xu Yilun
2025-11-17 2:23 ` [PATCH v1 21/26] x86/virt/tdx: Add SEAMCALL wrappers for SPDM management Xu Yilun
2025-11-17 2:23 ` [PATCH v1 22/26] coco/tdx-host: Implement SPDM session setup Xu Yilun
2025-11-17 2:23 ` [PATCH v1 23/26] coco/tdx-host: Parse ACPI KEYP table to init IDE for PCI host bridges Xu Yilun
2025-12-19 12:02 ` Jonathan Cameron
2025-11-17 2:23 ` [PATCH v1 24/26] x86/virt/tdx: Add SEAMCALL wrappers for IDE stream management Xu Yilun
2025-11-17 2:23 ` [PATCH v1 25/26] coco/tdx-host: Implement IDE stream setup/teardown Xu Yilun
2025-11-17 2:23 ` [PATCH v1 26/26] coco/tdx-host: Finally enable SPDM session and IDE Establishment Xu Yilun
2025-12-19 12:06 ` Jonathan Cameron
2025-12-23 10:45 ` Xu Yilun
2025-11-17 23:05 ` [PATCH v1 00/26] PCI/TSM: TDX Connect: SPDM Session " Dave Hansen
2025-11-18 1:07 ` Xu Yilun
2025-11-19 15:18 ` Dave Hansen
2025-11-19 15:50 ` dan.j.williams
2025-11-19 16:19 ` Dave Hansen
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