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client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by BL02EPF0001A0FE.mail.protection.outlook.com (10.167.242.105) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9678.18 via Frontend Transport; Tue, 10 Mar 2026 06:00:42 +0000 Received: from volcano-f23bhost.amd.com (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Tue, 10 Mar 2026 01:00:40 -0500 From: Manali Shukla To: , CC: , , , , , , , , , , Subject: [PATCH v3 7/9] perf/x86/amd: Enable VPMU passthrough capability for IBS PMU Date: Tue, 10 Mar 2026 06:00:19 +0000 Message-ID: <20260310060022.15120-8-manali.shukla@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260310060022.15120-1-manali.shukla@amd.com> References: <20260310060022.15120-1-manali.shukla@amd.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A0FE:EE_|MN0PR12MB6199:EE_ X-MS-Office365-Filtering-Correlation-Id: ada91cff-b22c-4dd5-afc0-08de7e6a5ce8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|36860700016|1800799024; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: +/FOMUP7KAOSY0HwBm5GLuae74t9Men2htYfpW71iKhzMOqwt1ejkgIPrt7nPkikZmUUbvPonwfm21cUIlTHxYRkG46Rs9hst36G0CijpEmDHImUcGy/drEpyMaBKwaYT/VNGild9FwBhXccG5Wgn7ZEk/K0o2sm+uaOw1XI/72A7kDGszg/6d2CNMtQzaCpr/BZ31uCa9g/E2FeN0WI3WFoL11SZHTXskTq2ijs9FWEc9kWglG4vNfNlWeH3rRNCamZPqKgopt0iNO9hCaNcgOl9by/i7/5OP1BaV+b8ocLVUPiPGEzl57VuMtUUv0RI2ibr8/tp5UtSMecc5dEIB2thCpZoZhVv8LZhboR7y3+bISYayjusfQQIdHo5rE/quneJ61tgXkHY6g9NWAFpf5kEDzI5VlXvoneAiKqmkkP38wfbeipRiUifWvWng1F X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Mar 2026 06:00:42.3123 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ada91cff-b22c-4dd5-afc0-08de7e6a5ce8 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A0FE.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6199 IBS MSRs are classified as Swap Type C, which requires the hypervisor to save and restore its own IBS state before VMENTRY and after VMEXIT. To support this, set the ibs_op and ibs_fetch PMUs with the PERF_PMU_CAP_MEDIATED_VPMU capability. This ensures that these PMUs are exclusively owned by the guest while it is running, allowing the hypervisor to manage IBS state transitions correctly. Signed-off-by: Manali Shukla --- arch/x86/events/amd/ibs.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c index 09b56bab510a..034a992bbfe3 100644 --- a/arch/x86/events/amd/ibs.c +++ b/arch/x86/events/amd/ibs.c @@ -971,6 +971,7 @@ static struct perf_ibs perf_ibs_fetch = { .stop = perf_ibs_stop, .read = perf_ibs_read, .check_period = perf_ibs_check_period, + .capabilities = PERF_PMU_CAP_MEDIATED_VPMU, }, .msr = MSR_AMD64_IBSFETCHCTL, .msr2 = MSR_AMD64_IBSFETCHCTL2, @@ -997,6 +998,7 @@ static struct perf_ibs perf_ibs_op = { .stop = perf_ibs_stop, .read = perf_ibs_read, .check_period = perf_ibs_check_period, + .capabilities = PERF_PMU_CAP_MEDIATED_VPMU, }, .msr = MSR_AMD64_IBSOPCTL, .msr2 = MSR_AMD64_IBSOPCTL2, -- 2.43.0