[PATCH V2 0/4] KVM: x86/pmu: Add hardware Topdown metrics support

Zide Chen
2026-04-23T17:54:59Z

The Top-Down Microarchitecture Analysis (TMA) method is a structured
approach for identifying performance bottlenecks in out-of-order
processors.

Currently, guests support the TMA method by collecting Topdown events
using GP counters, which may trigger multiplexing. To free up scarce
GP counters, eliminate multiplexing-induced skew, and obtain coherent
Topdown metric ratios, it is desirable to expose fixed counter 3 and
the IA32_PERF_METRICS MSR to guests.

Several attempts have been made to virtualize this under the legacy
vPMU model [1][2][3], but they were unsuccessful. With the new mediated
vPMU, enabling TMA support in guests becomes much simpler. It avoids
invasive changes to the perf core, eliminates CPU pinning and
fixed-counter affinity issues, and reduces the latge overhead of
trapping and emulating MSR accesses.

[1] https://lore.kernel.org/kvm/20231031090613.2872700-1-dapeng1.mi@linux.intel.com/
[2] https://lore.kernel.org/all/20230927033124.1226509-1-dapeng1.mi@linux.intel.com/T/
[3] https://lwn.net/ml/linux-kernel/20221212125844.41157-1-likexu@tencent.com/

Tested on an SPR. Without this series, only raw topdown.*_slots events
work in the guest, and metric events (e.g. cpu/topdown-bad-spec/) are
not available.

With this series, metric events are visible in the guest. Run this
command on both host and guest:

$ perf stat --topdown --no-metric-only -- taskset -c 2 perf bench sched messaging

Host results:

# Running 'sched/messaging' benchmark:
# 20 sender and receiver processes per group
# 10 groups == 400 processes run

Total time: 1.500 [sec]

Performance counter stats for 'taskset -c 2 perf bench sched messaging':

4,266,060,558 TOPDOWN.SLOTS:u # 32.0 % tma_frontend_bound
# 5.2 % tma_bad_speculation
588,397,905 topdown-retiring:u # 13.8 % tma_retiring
# 49.0 % tma_backend_bound
1,376,283,990 topdown-fe-bound:u
2,096,827,304 topdown-be-bound:u
217,425,841 topdown-bad-spec:u
5,050,520 INT_MISC.UOP_DROPPING:u

Changes since V1:
- As suggested by Dapeng, implement a new selftest patch.
- Don't advertise fixed counter 3 if the host doesn't support it.
- Minor change in patch 1 to remove a magic number.

v1:
https://lore.kernel.org/kvm/20260226230606.146532-1-zide.chen@intel.com/T/#t

Dapeng Mi (2):
KVM: x86/pmu: Support Intel fixed counter 3 on mediated vPMU
KVM: x86/pmu: Support PERF_METRICS MSR in mediated vPMU

Zide Chen (2):
KVM: x86/pmu: Do not map fixed counters >= 3 to generic perf events
KVM: selftests: Add perf_metrics and fixed counter 3 tests

arch/x86/include/asm/kvm_host.h | 3 +-
arch/x86/include/asm/msr-index.h | 1 +
arch/x86/include/asm/perf_event.h | 1 +
arch/x86/kvm/cpuid.c | 8 ++-
arch/x86/kvm/pmu.c | 4 ++
arch/x86/kvm/vmx/pmu_intel.c | 57 +++++++++++----
arch/x86/kvm/vmx/pmu_intel.h | 5 ++
arch/x86/kvm/vmx/vmx.c | 6 ++
arch/x86/kvm/x86.c | 10 ++-
tools/arch/x86/include/asm/msr-index.h | 1 +
tools/testing/selftests/kvm/include/x86/pmu.h | 3 +
.../selftests/kvm/x86/pmu_counters_test.c | 71 +++++++++++++++++--
12 files changed, 148 insertions(+), 22 deletions(-)

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2.53.0