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From: Jason Gunthorpe <jgg@ziepe.ca>
To: fangyu.yu@linux.alibaba.com
Cc: alex@ghiti.fr, anup@brainfault.org, aou@eecs.berkeley.edu,
	atish.patra@linux.dev, baolu.lu@linux.intel.com,
	guoren@kernel.org, iommu@lists.linux.dev, joro@8bytes.org,
	kevin.tian@intel.com, kvm-riscv@lists.infradead.org,
	kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, palmer@dabbelt.com,
	pjw@kernel.org, robin.murphy@arm.com, skhawaja@google.com,
	tjeznach@rivosinc.com, vasant.hegde@amd.com, will@kernel.org
Subject: Re: Re: [RFC PATCH 01/11] iommupt: Add RISC-V Second-stage (iohgatp) page table support
Date: Wed, 29 Apr 2026 09:18:20 -0300	[thread overview]
Message-ID: <20260429121820.GL849557@ziepe.ca> (raw)
In-Reply-To: <20260429010650.61646-1-fangyu.yu@linux.alibaba.com>

On Wed, Apr 29, 2026 at 09:06:50AM +0800, fangyu.yu@linux.alibaba.com wrote:
> >> @@ -263,6 +281,22 @@ riscvpt_iommu_fmt_init(struct pt_iommu_riscv_64 *iommu_table,
> >>  	case 57:
> >>  		pt_top_set_level(&table->common, 4);
> >>  		break;
> >> +	/*
> >> +	 * Second-stage (iohgatp): Sv39x4 / Sv48x4 / Sv57x4.
> >> +	 * The top level is the same as for the first-stage counterpart.
> >> +	 */
> >> +	case 41:
> >> +		pt_top_set_level(&table->common, 2);
> >> +		table->second_stage = true;
> >> +		break;
> >
> >Second stage needs to be an explicit PT_FEAT not implicitly deduced
> >based on the vasz.
> 
> Agreed. I will add an explicit PT_FEAT_RISCV_SECOND_STAGE flag and
> stop deriving second-stage semantics from vasz.

PT_FEAT_RISCV_S2 would match what I have for ARM

Jason

  reply	other threads:[~2026-04-29 12:18 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-28 13:13 [RFC PATCH 00/11] iommu/riscv: Add hardware dirty tracking for second-stage domains fangyu.yu
2026-04-28 13:13 ` [RFC PATCH 01/11] iommupt: Add RISC-V Second-stage (iohgatp) page table support fangyu.yu
2026-04-28 13:32   ` Jason Gunthorpe
2026-04-29  1:06     ` fangyu.yu
2026-04-29 12:18       ` Jason Gunthorpe [this message]
2026-04-29 15:42         ` fangyu.yu
2026-04-28 13:13 ` [RFC PATCH 02/11] iommu/riscv: report iommu capabilities fangyu.yu
2026-04-28 13:33   ` Jason Gunthorpe
2026-04-29  1:15     ` fangyu.yu
2026-04-28 13:13 ` [RFC PATCH 03/11] iommu/riscv: use data structure instead of individual values fangyu.yu
2026-04-28 13:13 ` [RFC PATCH 04/11] iommu/riscv: support GSCID and GVMA invalidation command fangyu.yu
2026-04-28 13:13 ` [RFC PATCH 05/11] RISC-V: KVM: Enable KVM_VFIO interfaces on RISC-V arch fangyu.yu
2026-04-28 13:13 ` [RFC PATCH 06/11] iommu/riscv: Add domain_alloc_paging_flags for second-stage domain fangyu.yu
2026-04-28 13:35   ` Jason Gunthorpe
2026-04-29  1:21     ` fangyu.yu
2026-04-28 13:13 ` [RFC PATCH 07/11] iommupt: Don't preset D when RISC-V IOMMU dirty tracking on fangyu.yu
2026-04-28 13:36   ` Jason Gunthorpe
2026-04-29  1:41     ` fangyu.yu
2026-04-28 13:13 ` [RFC PATCH 08/11] iommu/riscv: Add dirty tracking support for second-stage domains fangyu.yu
2026-04-28 13:38   ` Jason Gunthorpe
2026-04-29  1:46     ` fangyu.yu
2026-04-28 13:13 ` [RFC PATCH 09/11] iommu/riscv: Add IOTINVAL.GVMA after updating DDT/PDT entries fangyu.yu
2026-04-28 13:13 ` [RFC PATCH 10/11] iommupt: Add RISC-V dirty tracking PTE ops fangyu.yu
2026-04-28 13:39   ` Jason Gunthorpe
2026-04-29  1:52     ` fangyu.yu
2026-04-28 13:13 ` [RFC PATCH 11/11] iommu/riscv: support nested iommu for getting iommu hardware information fangyu.yu
2026-04-28 13:39   ` Jason Gunthorpe
2026-04-29  2:37     ` fangyu.yu
2026-05-04 19:53 ` [RFC PATCH 00/11] iommu/riscv: Add hardware dirty tracking for second-stage domains Andrew Jones
2026-05-05 13:48   ` fangyu.yu

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