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[80.230.47.179]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45054b02c5asm3625078f8f.19.2026.05.05.03.53.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 May 2026 03:53:50 -0700 (PDT) Date: Tue, 5 May 2026 06:53:48 -0400 From: "Michael S. Tsirkin" To: Thomas Huth Cc: =?iso-8859-1?Q?Cl=E9ment?= MATHIEU--DRIF , Peter Xu , Paolo Bonzini , "kvm@vger.kernel.org" , Yi Liu Subject: Re: intel_iommu unit test is also failing Message-ID: <20260505065122-mutt-send-email-mst@kernel.org> References: <8aa24294-439f-4484-b6fc-9327b6fd0306@redhat.com> <600b025e-602e-4128-9679-f53f32b96e8e@redhat.com> <96f57df07e6d39e30557357142b2212e0ea26af4.camel@bull.com> <0abf41c113c9425ea4c73a108db22f28290fa395.camel@bull.com> <13002aef21dec62205c252f3d12bb42ea59cf287.camel@bull.com> <6b338140-873c-4303-bdd1-633d69f4a971@redhat.com> <20260505061927-mutt-send-email-mst@kernel.org> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Tue, May 05, 2026 at 12:34:41PM +0200, Thomas Huth wrote: > On 05/05/2026 12.23, Michael S. Tsirkin wrote: > > On Tue, May 05, 2026 at 11:45:17AM +0200, Thomas Huth wrote: > > > On 05/05/2026 11.27, Clément MATHIEU--DRIF wrote: > > > > I had a bit more time to hook into qemu to check the root cause. > > > > > > > > It seems that testb issues a single byte read (out of the valid size range), as we can see on the following breakpoint: > > > > > > > > ``` > > > > Thread 6 "CPU 0/TCG" hit Breakpoint 2, memory_region_dispatch_read (mr=0x55d72883cb30, addr=152, pval=0x7f62d25f4590, op=MO_BSWAP, attrs=...) at ../system/memory.c:1473 > > > > 1473 unsigned size = memop_size(op); > > > > (gdb) n > > > > 1474 MemTxResult r; > > > > (gdb) p size > > > > $1 = 1 > > > > (gdb) > > > > ``` > > > > > > Ouch! That's an excellent finding, Clément ... so GCC 16 is "smart" enough > > > to see that we only want to test the lowest bit here, so it optimizes the > > > code to access only one byte of memory instead of 4 bytes... which would be > > > ok for normal memory, but not for an MMIO register :-/ > > > > > > Ugly work-around, to force GCC to read 32 bits: > > > > > > diff --git a/lib/asm-generic/io.h b/lib/asm-generic/io.h > > > --- a/lib/asm-generic/io.h > > > +++ b/lib/asm-generic/io.h > > > @@ -38,7 +38,9 @@ static inline u16 __raw_readw(const volatile void *addr) > > > #ifndef __raw_readl > > > static inline u32 __raw_readl(const volatile void *addr) > > > { > > > - return *(const volatile u32 *)addr; > > > + u32 val = *(const volatile u32 *)addr; > > > + asm volatile ("\n" : : "r"(addr)); > > > + return val; > > > } > > > #endif > > > > > > ... but I wonder whether this should rather be treated as a bug in GCC > > > instead, since it should IMHO really not change the access size for a > > > volatile memory access? > > > > > > Thomas > > > > Wouldn't this break linux generally? > > > > #ifndef __READ_ONCE > > #define __READ_ONCE(x) (*(const volatile __unqual_scalar_typeof(x) *)&(x)) > > #endif > > I asked myself the very same question, but after googling for "GCC 16 linux > kernel" issues, I did not find anything related... there is likely something > specific to kvm-unit-tests in here... > > Thomas This seems to be pertinent: https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html -ffuse-ops-with-volatile-access Allow limited optimization of operations with volatile memory access when doing so does not change the semantics outlined in See When is a Volatile Object Accessed?. The default is -ffuse-ops-with-volatile-access implemented here: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122343 Try disabling? -fno-fuse-ops-with-volatile-access -- MST