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Mon, 29 Jun 2026 11:04:58 +0000 (GMT) Received: from li-3c92a0cc-27cf-11b2-a85c-b804d9ca68fa.bl1-in.ibm.com (unknown [9.123.10.203]) by smtpav02.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 29 Jun 2026 11:04:58 +0000 (GMT) From: Aditya Gupta To: , , Harsh Prateek Bora , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Shivang Upadhyay , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= Cc: Sourabh Jain , Hari Bathini , Nicholas Piggin , Miles Glenn , Fabiano Rosas , Laurent Vivier , Paolo Bonzini , devel@lists.libvirt.org, Misbah Anjum N , Anushree Mathur , Pierrick Bouvier , kvm@vger.kernel.org, Gautam Menghani , Chinmay Rath Subject: [PATCH v3 3/8] tests/qtest: Add Power11 chip & machine to qtests Date: Mon, 29 Jun 2026 16:34:06 +0530 Message-ID: <20260629110411.3051274-4-adityag@linux.ibm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260629110411.3051274-1-adityag@linux.ibm.com> References: <20260629110411.3051274-1-adityag@linux.ibm.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Authority-Analysis: v=2.4 cv=RYqgzVtv c=1 sm=1 tr=0 ts=6a425164 cx=c_pps a=5BHTudwdYE3Te8bg5FgnPg==:117 a=5BHTudwdYE3Te8bg5FgnPg==:17 a=FelO9ux0wxsA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=uAbxVGIbfxUO_5tXvNgY:22 a=VnNF1IyMAAAA:8 a=ecs4qFjb3cSJlp2yJ8oA:9 X-Proofpoint-Spam-Info: AW1haW4tMjYwNjI5MDA4OCBTYWx0ZWRfX3bBj8pMoq/+v Q1RnWRCR8LR8otUXB3f0foajVLU9qzIuwZ5kkgKLf2+DAroDI/TcL7M13ZJC/7bIl0VinolB2/x SMGFpQYq5X6mXbRMMFYDNmKrpG11t9o= X-Proofpoint-GUID: j66v-6MjuA8lFnjxklxNSbU6jbeD0MLL X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjI5MDA4OCBTYWx0ZWRfX8bzEYXuu8o/h jVssvRimL6NoSglUasD9wuD10fHCXnKIyDjQmAa1+lwypwADiH+foY3+Y5JRxKtLLCl50UCPwqj 2L2j3c5NYVJ4W0QE6ShrzPEBDbs4qi/ZMYbi+kHOb1fGIb/I9Hws1c6Vyl9+1IUN0l9EKiMLZ1q /ZeoSwW64ySJKaRp6M/PcKP1VLJeOuE8p6naBLMxn2M94ESxYic8BDs9AJIzBzMhVaO6x/yj2PW DbDGT2VW+L2msetioB+XkqlNVatvg1pl6yi8Hl3nSYIw8lcok/qhTElkBLzPJnaGiBxGw+jVJq0 v0hVRM4LSxMyp86Q48svgLULqvsN4L224sM/sG71Uq973vaGrGq0+SrYKTint+5OuM3+5Qty1Nk jl4wIkuIIDa4C/f3CmCM1/BoPUeg5JcFjBWHKBO77iccjf730tv17g/PX2Hrz2Sl6pCP+Ewmd5n 0zZ8WOK8nUfowV+0q+w== X-Proofpoint-ORIG-GUID: 2OdOIM7OdOHNpybW8EDh2-jTKYAJQdPx X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-29_03,2026-06-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 impostorscore=0 malwarescore=0 spamscore=0 lowpriorityscore=0 adultscore=0 priorityscore=1501 suspectscore=0 bulkscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2606290088 Previously the machines/chips tested by qtest was till Power10, update the tests to also test PowerNV11 and Power11 PNV Chip Since if-else-if ladder was common pattern to get machine type, implement pnv_get_machine_type so new processor cases can be implemented in one location in pnv_get_machine_type While at it, also add g_autofree to allocation by g_strdup_printf in modified tests Signed-off-by: Aditya Gupta --- tests/qtest/pnv-host-i2c-test.c | 10 ++++------ tests/qtest/pnv-spi-seeprom-test.c | 2 +- tests/qtest/pnv-xive2-test.c | 2 +- tests/qtest/pnv-xscom-test.c | 22 +++++--------------- tests/qtest/pnv-xscom.h | 32 +++++++++++++++++++++++++++--- 5 files changed, 40 insertions(+), 28 deletions(-) diff --git a/tests/qtest/pnv-host-i2c-test.c b/tests/qtest/pnv-host-i2c-test.c index 51e613ebdcb2..5fd54f9de771 100644 --- a/tests/qtest/pnv-host-i2c-test.c +++ b/tests/qtest/pnv-host-i2c-test.c @@ -402,15 +402,14 @@ static void reset_all(QTestState *qts, const PnvChip *chip) static void test_host_i2c(const void *data) { const PnvChip *chip = data; + const char *machine = pnv_get_machine_type(chip->chip_type); QTestState *qts; - const char *machine = "powernv8"; PnvI2cCtlr ctlr; PnvI2cDev pca9552; PnvI2cDev pca9554; - if (chip->chip_type == PNV_CHIP_POWER9) { - machine = "powernv9"; - } else if (chip->chip_type == PNV_CHIP_POWER10) { + /* i2c is initialised for rainier in case of P10 */ + if (chip->chip_type == PNV_CHIP_POWER10) { machine = "powernv10-rainier"; } @@ -473,10 +472,9 @@ static void add_test(const char *name, void (*test)(const void *data)) int i; for (i = 0; i < ARRAY_SIZE(pnv_chips); i++) { - char *tname = g_strdup_printf("pnv-xscom/%s/%s", name, + g_autofree char *tname = g_strdup_printf("pnv-xscom/%s/%s", name, pnv_chips[i].cpu_model); qtest_add_data_func(tname, &pnv_chips[i], test); - g_free(tname); } } diff --git a/tests/qtest/pnv-spi-seeprom-test.c b/tests/qtest/pnv-spi-seeprom-test.c index 1a78e8d966a5..8bb30eb649aa 100644 --- a/tests/qtest/pnv-spi-seeprom-test.c +++ b/tests/qtest/pnv-spi-seeprom-test.c @@ -77,7 +77,7 @@ static void test_spi_seeprom(const void *data) const PnvChip *chip = data; QTestState *qts = NULL; g_autofree char *tmp_path = NULL; - const char *machine = "powernv10"; + const char *machine = pnv_get_machine_type(chip->chip_type); int ret; int fd; diff --git a/tests/qtest/pnv-xive2-test.c b/tests/qtest/pnv-xive2-test.c index 5313d4ef18b7..80de9d09ed09 100644 --- a/tests/qtest/pnv-xive2-test.c +++ b/tests/qtest/pnv-xive2-test.c @@ -548,7 +548,7 @@ static void test_xive(void) { QTestState *qts; - qts = qtest_initf("-M powernv10 -smp %d,cores=1,threads=%d -nographic " + qts = qtest_initf("-M powernv11 -smp %d,cores=1,threads=%d -nographic " "-nodefaults -serial mon:stdio -S " "-d guest_errors -trace '*xive*'", SMT, SMT); diff --git a/tests/qtest/pnv-xscom-test.c b/tests/qtest/pnv-xscom-test.c index c814c0f4f5b1..94b50c071c02 100644 --- a/tests/qtest/pnv-xscom-test.c +++ b/tests/qtest/pnv-xscom-test.c @@ -28,15 +28,9 @@ static void test_xscom_cfam_id(QTestState *qts, const PnvChip *chip) static void test_cfam_id(const void *data) { const PnvChip *chip = data; - const char *machine = "powernv8"; + const char *machine = pnv_get_machine_type(chip->chip_type); QTestState *qts; - if (chip->chip_type == PNV_CHIP_POWER9) { - machine = "powernv9"; - } else if (chip->chip_type == PNV_CHIP_POWER10) { - machine = "powernv10"; - } - qts = qtest_initf("-M %s -accel tcg -cpu %s", machine, chip->cpu_model); test_xscom_cfam_id(qts, chip); @@ -57,7 +51,8 @@ static void test_cfam_id(const void *data) static void test_xscom_core(QTestState *qts, const PnvChip *chip) { - if (chip->chip_type == PNV_CHIP_POWER10) { + if ((chip->chip_type == PNV_CHIP_POWER10) || + (chip->chip_type == PNV_CHIP_POWER11)) { uint32_t first_core_thread_state = PNV_XSCOM_P10_EC_BASE(chip->first_core) + 0x412; uint64_t thread_state; @@ -84,14 +79,8 @@ static void test_xscom_core(QTestState *qts, const PnvChip *chip) static void test_core(const void *data) { const PnvChip *chip = data; + const char *machine = pnv_get_machine_type(chip->chip_type); QTestState *qts; - const char *machine = "powernv8"; - - if (chip->chip_type == PNV_CHIP_POWER9) { - machine = "powernv9"; - } else if (chip->chip_type == PNV_CHIP_POWER10) { - machine = "powernv10"; - } qts = qtest_initf("-M %s -accel tcg -cpu %s", machine, chip->cpu_model); @@ -104,10 +93,9 @@ static void add_test(const char *name, void (*test)(const void *data)) int i; for (i = 0; i < ARRAY_SIZE(pnv_chips); i++) { - char *tname = g_strdup_printf("pnv-xscom/%s/%s", name, + g_autofree char *tname = g_strdup_printf("pnv-xscom/%s/%s", name, pnv_chips[i].cpu_model); qtest_add_data_func(tname, &pnv_chips[i], test); - g_free(tname); } } diff --git a/tests/qtest/pnv-xscom.h b/tests/qtest/pnv-xscom.h index 5aa1701ea768..eefe206a2007 100644 --- a/tests/qtest/pnv-xscom.h +++ b/tests/qtest/pnv-xscom.h @@ -9,6 +9,9 @@ #ifndef PNV_XSCOM_H #define PNV_XSCOM_H +#include +#include + #define SMT 4 /* some tests will break if less than 4 */ typedef enum PnvChipType { @@ -17,6 +20,7 @@ typedef enum PnvChipType { PNV_CHIP_POWER8NVL, /* AKA Naples */ PNV_CHIP_POWER9, /* AKA Nimbus */ PNV_CHIP_POWER10, + PNV_CHIP_POWER11, } PnvChipType; typedef struct PnvChip { @@ -60,15 +64,23 @@ static const PnvChip pnv_chips[] = { .first_core = 0x0, .num_i2c = 4, }, + { + .chip_type = PNV_CHIP_POWER11, + .cpu_model = "Power11", + .xscom_base = 0x000603fc00000000ull, + .cfam_id = 0x220da04980000000ull, + .first_core = 0x0, + .num_i2c = 0, + }, }; static inline uint64_t pnv_xscom_addr(const PnvChip *chip, uint32_t pcba) { uint64_t addr = chip->xscom_base; - if (chip->chip_type == PNV_CHIP_POWER10) { - addr |= ((uint64_t) pcba << 3); - } else if (chip->chip_type == PNV_CHIP_POWER9) { + if ((chip->chip_type == PNV_CHIP_POWER11) || + (chip->chip_type == PNV_CHIP_POWER10) || + (chip->chip_type == PNV_CHIP_POWER9)) { addr |= ((uint64_t) pcba << 3); } else { addr |= (((uint64_t) pcba << 4) & ~0xffull) | @@ -77,4 +89,18 @@ static inline uint64_t pnv_xscom_addr(const PnvChip *chip, uint32_t pcba) return addr; } +static const char *pnv_get_machine_type(enum PnvChipType chip_type) +{ + static const char *const machine_types[] = { + [PNV_CHIP_POWER8] = "powernv8", + [PNV_CHIP_POWER9] = "powernv9", + [PNV_CHIP_POWER10] = "powernv10", + [PNV_CHIP_POWER11] = "powernv11", + }; + + g_assert(chip_type <= PNV_CHIP_POWER11); + + return machine_types[chip_type]; +} + #endif /* PNV_XSCOM_H */ -- 2.54.0