From: sashiko-bot@kernel.org
To: "Guodong Xu" <docular.xu@gmail.com>
Cc: kvm@vger.kernel.org, robh@kernel.org, devicetree@vger.kernel.org,
conor+dt@kernel.org
Subject: Re: [PATCH v5 15/17] riscv: cpufeature: Introduce ISA bases bitmap and rva23u64 detection
Date: Wed, 01 Jul 2026 14:22:29 +0000 [thread overview]
Message-ID: <20260701142230.A575F1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260701-rva23u64-hwprobe-v2-v5-15-2c61f94a695a@gmail.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The RVA23U64 base detection wrongly mandates the legacy broad `B` extension superset instead of its required bitmanip constituent extensions (`Zba`, `Zbb`, `Zbs`).
--
commit e73d8757f0ce7270b4b39989368d4e83e5a355fc
Author: Guodong Xu <docular.xu@gmail.com>
riscv: cpufeature: Introduce ISA bases bitmap and rva23u64 detection
This commit introduces a per-hart and host-wide bitmap of conformant ISA
profile bases, such as IMA and RVA23U64. The bitmap is computed during
init by riscv_init_isa_bases() and registered as a subsys_initcall.
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index 4c3bf813af052..fa8471aef42ee 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
[ ... ]
> @@ -1304,3 +1307,90 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin,
> }
> }
> #endif
[ ... ]
> + /* RVA23U64 */
> +
> + /* Supm with PMLEN=7 */
> + if (!riscv_have_user_pmlen(7))
> + return;
> +
> + __set_bit(RISCV_ISA_EXT_F, ext_mask);
> + __set_bit(RISCV_ISA_EXT_D, ext_mask);
> + __set_bit(RISCV_ISA_EXT_C, ext_mask);
> + __set_bit(RISCV_ISA_EXT_B, ext_mask);
[Severity: Medium]
Does this incorrectly mandate the legacy broad B extension for RVA23U64?
If a RISC-V device tree advertises the RVA23U64 constituent bitmanip
extensions (e.g., zba, zbb, zbs) but omits the legacy unratified 'b'
string, it appears this check will fail because RISCV_ISA_EXT_B won't be
synthesized. Should this instead check for the individual constituent
extensions required by the profile?
> + __set_bit(RISCV_ISA_EXT_ZICSR, ext_mask);
> + __set_bit(RISCV_ISA_EXT_ZICNTR, ext_mask);
> + __set_bit(RISCV_ISA_EXT_ZIHPM, ext_mask);
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260701-rva23u64-hwprobe-v2-v5-0-2c61f94a695a@gmail.com?part=15
next prev parent reply other threads:[~2026-07-01 14:22 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-01 12:52 [PATCH v5 00/17] riscv: hwprobe: Expose RVA23U64 base behavior Guodong Xu
2026-07-01 12:52 ` [PATCH v5 01/17] dt-bindings: riscv: sort multi-letter Z extensions alphanumerically Guodong Xu
2026-07-01 12:52 ` [PATCH v5 02/17] riscv: hwprobe.rst: Make indentation consistent Guodong Xu
2026-07-01 12:52 ` [PATCH v5 03/17] riscv: hwprobe.rst: Document EXT_ZICFISS and EXT_ZICFILP Guodong Xu
2026-07-01 12:52 ` [PATCH v5 04/17] riscv: Standardize extension capitalization Guodong Xu
2026-07-01 12:52 ` [PATCH v5 05/17] riscv: Add Zicclsm to cpufeature and hwprobe Guodong Xu
2026-07-01 12:52 ` [PATCH v5 06/17] riscv: Add Ziccamoa, Ziccif, Ziccrse, and Za64rs " Guodong Xu
2026-07-01 12:52 ` [PATCH v5 07/17] riscv: Add B to hwcap " Guodong Xu
2026-07-01 13:27 ` sashiko-bot
2026-07-01 12:52 ` [PATCH v5 08/17] dt-bindings: riscv: Require block-size for Zicbom, Zicbop, and Zicboz Guodong Xu
2026-07-01 13:35 ` sashiko-bot
2026-07-01 15:54 ` Rob Herring (Arm)
2026-07-01 20:39 ` Conor Dooley
2026-07-01 12:52 ` [PATCH v5 09/17] dt-bindings: riscv: Add Zic64b extension description Guodong Xu
2026-07-01 13:42 ` sashiko-bot
2026-07-01 12:52 ` [PATCH v5 10/17] riscv: Add Zic64b to cpufeature and hwprobe Guodong Xu
2026-07-01 13:53 ` sashiko-bot
2026-07-01 12:52 ` [PATCH v5 11/17] riscv: dts: spacemit: k3: Add Zic64b ISA extension Guodong Xu
2026-07-01 12:52 ` [PATCH v5 12/17] riscv: dts: spacemit: k1: " Guodong Xu
2026-07-01 14:00 ` sashiko-bot
2026-07-01 12:52 ` [PATCH v5 13/17] riscv: dts: sophgo: sg2044: " Guodong Xu
2026-07-01 12:52 ` [PATCH v5 14/17] riscv: Add a getter for user PMLEN support Guodong Xu
2026-07-01 12:52 ` [PATCH v5 15/17] riscv: cpufeature: Introduce ISA bases bitmap and rva23u64 detection Guodong Xu
2026-07-01 14:22 ` sashiko-bot [this message]
2026-07-01 12:52 ` [PATCH v5 16/17] riscv: cpu: Output isa bases lines in cpuinfo Guodong Xu
2026-07-01 12:52 ` [PATCH v5 17/17] riscv: hwprobe: Introduce rva23u64 base behavior Guodong Xu
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