From: sashiko-bot@kernel.org
To: "Sairaj Kodilkar" <sarunkod@amd.com>
Cc: kvm@vger.kernel.org
Subject: Re: [PATCH v2 1/2] x86/uaccess: Extend CMPXCHG user helpers to 128-bit operands
Date: Mon, 06 Jul 2026 06:52:12 +0000 [thread overview]
Message-ID: <20260706065212.CCD741F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260706063035.1139-2-sarunkod@amd.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The 32-bit stub for `__try_cmpxchg128_user_asm` incorrectly evaluates to 1 (success) instead of 0 (failure), silently skipping emulation while falsely signaling a successful memory update.
--
commit 11b4c82317b376374b32df0435151f876d6239e5
Author: Sairaj Kodilkar <sarunkod@amd.com>
x86/uaccess: Extend CMPXCHG user helpers to 128-bit operands
This commit extends the user CMPXCHG helpers to support 16-byte operands
on x86-64 using the cmpxchg16b instruction. It also adds a 32-bit stub
that is intended to always return failure since cmpxchg16b requires
64-bit GPRs.
> diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h
> index 367297b188c39..123755d471099 100644
> --- a/arch/x86/include/asm/uaccess.h
> +++ b/arch/x86/include/asm/uaccess.h
[ ... ]
> @@ -551,11 +594,18 @@ do { \
>
> extern void __try_cmpxchg_user_wrong_size(void);
>
> -#ifndef CONFIG_X86_32
> +#ifdef CONFIG_X86_32
> +/* Always fail on 32 bit arch as it do not support 128 cmpxchg (i.e. cmpxchg16b
> + * instruction).
> + */
> +#define __try_cmpxchg128_user_asm(_ptr, _pold, _new, label) (1)
[Severity: Medium]
Does this 32-bit stub correctly signal failure?
Since this macro evaluates to 1, won't the surrounding unsafe_try_cmpxchg_user
macro treat this as success (true) rather than failure (false)?
This could cause the wrapper to negate the value and return 0 (success) to the
caller, falsely signaling a successful memory exchange without actually
updating memory or the old value. Even though there are no current 32-bit
callers using a 16-byte operand, should this evaluate to 0 instead of 1 to
ensure theoretical future callers don't encounter a silent atomicity break?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260706063035.1139-1-sarunkod@amd.com?part=1
next prev parent reply other threads:[~2026-07-06 6:52 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-06 6:30 [PATCH v2 0/2] Add support for cmpxchg16b emulation Sairaj Kodilkar
2026-07-06 6:30 ` [PATCH v2 1/2] x86/uaccess: Extend CMPXCHG user helpers to 128-bit operands Sairaj Kodilkar
2026-07-06 6:52 ` sashiko-bot [this message]
2026-07-06 8:00 ` Sairaj Kodilkar
2026-07-06 6:30 ` [PATCH v2 2/2] KVM: x86: Add support for cmpxchg16b emulation Sairaj Kodilkar
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