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Sun, 12 Jul 2026 18:03:48 -0700 (PDT) From: Inochi Amaoto To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Anup Patel , Atish Patra , Paolo Bonzini , Shuah Khan , Andy Chiu , Charlie Jenkins , Deepak Gupta , Thomas Huth , Inochi Amaoto , Sergey Matyukevich Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org, Yixun Lan , Longbin Li Subject: [PATCH v6 0/8] RISC-V: KVM: Add Svadu/Zicfiss/Zicfilp FWFT support Date: Mon, 13 Jul 2026 09:02:53 +0800 Message-ID: <20260713010302.303278-1-inochiama@gmail.com> X-Mailer: git-send-email 2.55.0 Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This patchset based on the patchset "RISC-V: KVM: Add Zicfiss/Zicfilp support". The patch includes all the function of original patchset from Quan: adding the Svadu/Zicfiss/Zicfilp FWFT for the RISC-V KVM. And this patchset already passes the KVM unit test. Test with the patch applied https://lore.kernel.org/all/20260618064406.14508-1-cuiyunhui@bytedance.com/ Changed from v5: - https://lore.kernel.org/kvm/20260706022046.214956-1-inochiama@gmail.com/ patch 1, 5: 1. Switch to csr_read()/csr_write() to update csr patch 8: 1. Fix the macro name. Changed from v4: - https://lore.kernel.org/kvm/20260701020746.170157-1-inochiama@gmail.com/ patch 1: 1. Use NACL for csr update 2. Check ISA mapping before cleaning the ADUE bit patch 4: 1. Clear the zicfiss csr during a VCPU reset 2. Add zicfiss csr to num_csr_regs() patch 6: 1. Cleanup SPELP after redirecting the trap patch 7: 1. Use interrupt bit instead of number for masking/unmasking patch 8: 1. Add missing entry for the test 2. Fix the wrong comment. Changed from v3: - https://lore.kernel.org/kvm/20260607081105.993908-1-inochiama@gmail.com/ 1. rebase to the v7.2-rc1 2. Tested with the updated Svadu patch 3. Remove the dependency as it is already merged. Changed from v2: - https://lore.kernel.org/kvm/20260601084336.2601675-1-inochiama@gmail.com/ 1. rebase with Yong-Xuan's patch set 2. Add SSP CSR context switch/set/get 3. Move the software-check exception set/unset into FWFT 4. Only delegate software-check exception when Zicfiss/Zicfilp is enabled. 5. Make KVM SBI_FWFT_PTE_AD_HW_UPDATING depends on both Svadu and Svade enabled. Changed from Quan's v1: - https://lore.kernel.org/kvm/cover.1764509485.git.zhouquan@iscas.ac.cn/ 1. rebase to the latest master. 2. Split Svadu change as separate patch 3. Fix all build error from the original series 4. Remove the Svadu check in kvm_riscv_vcpu_config_ran_once() and in favor of the FWFT. 5. Remove the LPE/SSE setting bit in kvm_riscv_vcpu_config_ran_once() (kvm_riscv_vcpu_setup_config() in original patchset) Inochi Amaoto (8): RISC-V: KVM: Add support for Svadu FWFT features KVM: riscv: selftests: add Svadu FWFT extension to get-reg-list test RISC-V: KVM: Allow Zicfiss/Zicfilp extensions for Guest/VM RISC-V: KVM: Add ssp context save/restore RISC-V: KVM: Handle software-check exits for VCPU RISC-V: KVM: Delegate SPELP bit to VS/VU mode if landing pad is enabled. RISC-V: KVM: Add support for control-flow integrity FWFT features KVM: riscv: selftests: add Zicfiss/Zicfilp extension to get-reg-list test arch/riscv/include/asm/csr.h | 1 + arch/riscv/include/asm/kvm_host.h | 7 + arch/riscv/include/uapi/asm/kvm.h | 13 ++ arch/riscv/kvm/isa.c | 2 + arch/riscv/kvm/vcpu.c | 7 + arch/riscv/kvm/vcpu_exit.c | 11 ++ arch/riscv/kvm/vcpu_onereg.c | 68 ++++++- arch/riscv/kvm/vcpu_sbi_fwft.c | 183 ++++++++++++++++++ .../selftests/kvm/riscv/get-reg-list.c | 90 +++++++++ 9 files changed, 380 insertions(+), 2 deletions(-) -- 2.55.0