From: sashiko-bot@kernel.org
To: "Akihiko Odaki" <odaki@rsg.ci.i.u-tokyo.ac.jp>
Cc: kvm@vger.kernel.org, "Marc Zyngier" <maz@kernel.org>,
"Oliver Upton" <oupton@kernel.org>,
kvmarm@lists.linux.dev
Subject: Re: [PATCH v9 05/16] KVM: arm64: PMU: Keep implemented counter mask EL-independent
Date: Mon, 20 Jul 2026 05:53:23 +0000 [thread overview]
Message-ID: <20260720055324.149651F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260720-hybrid-v9-5-2b713ca1b5dc@rsg.ci.i.u-tokyo.ac.jp>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
Pre-existing issues:
- [High] State loss of EL2-reserved PMU counters during live migration.
--
--- Patch [5]: [PATCH v9 05/16] KVM: arm64: PMU: Keep implemented counter mask EL-independent ---
commit 0e1ed9d5217011f901071c9f1da4dcee65204dd7
Author: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
KVM: arm64: PMU: Keep implemented counter mask EL-independent
This commit changes kvm_pmu_implemented_counter_mask() to build the
implemented counter mask from nr_pmu_counters instead of PMCR_EL0.N. This
prevents EL2 counter state from being lost during PMU reloads when the
saved context is outside EL2.
> diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c
> index b4b877f31097f..5281d37634a06 100644
> --- a/arch/arm64/kvm/pmu-emul.c
> +++ b/arch/arm64/kvm/pmu-emul.c
> @@ -317,12 +317,12 @@ u64 kvm_pmu_accessible_counter_mask(struct kvm_vcpu *vcpu)
>
> u64 kvm_pmu_implemented_counter_mask(struct kvm_vcpu *vcpu)
> {
> - u64 val = FIELD_GET(ARMV8_PMU_PMCR_N, kvm_vcpu_read_pmcr(vcpu));
> + u64 n = vcpu->kvm->arch.nr_pmu_counters;
>
> - if (val == 0)
> + if (n == 0)
> return BIT(ARMV8_PMU_CYCLE_IDX);
> else
> - return GENMASK(val - 1, 0) | BIT(ARMV8_PMU_CYCLE_IDX);
> + return GENMASK(n - 1, 0) | BIT(ARMV8_PMU_CYCLE_IDX);
> }
[Severity: High]
This is a pre-existing issue, but does restricting guest access via
kvm_pmu_accessible_counter_mask() also inadvertently drop EL2 state during
live migration?
Looking at get_pmreg() in arch/arm64/kvm/sys_regs.c, when userspace invokes
KVM_GET_ONE_REG to save PMU registers like PMCNTENSET_EL0:
arch/arm64/kvm/sys_regs.c:get_pmreg() {
...
u64 mask = kvm_pmu_accessible_counter_mask(vcpu);
*val = __vcpu_sys_reg(vcpu, r->reg) & mask;
...
}
And similarly when restoring in set_pmreg():
arch/arm64/kvm/sys_regs.c:set_pmreg() {
...
u64 mask = kvm_pmu_accessible_counter_mask(vcpu);
__vcpu_assign_sys_reg(vcpu, r->reg, val & mask);
...
}
If a nested VM is migrated while its vCPU is executing in EL1/EL0,
kvm_pmu_accessible_counter_mask() strips out the EL2 counters because
vcpu_is_el2() is false. Could this cause KVM to silently discard the
EL2-reserved counter state on the source and fail to restore it on the
target?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260720-hybrid-v9-0-2b713ca1b5dc@rsg.ci.i.u-tokyo.ac.jp?part=5
next prev parent reply other threads:[~2026-07-20 5:53 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-20 5:37 [PATCH v9 00/16] KVM: arm64: PMU: Use multiple host PMUs Akihiko Odaki
2026-07-20 5:37 ` [PATCH v9 01/16] KVM: arm64: Serialize repeated vCPU initialization Akihiko Odaki
2026-07-20 5:37 ` [PATCH v9 02/16] KVM: arm64: PMU: Stop updating MDCR_EL2.HPMN Akihiko Odaki
2026-07-20 5:58 ` sashiko-bot
2026-07-20 5:37 ` [PATCH v9 03/16] KVM: arm64: PMU: Freeze counter count after first run Akihiko Odaki
2026-07-20 5:37 ` [PATCH v9 04/16] KVM: arm64: selftests: Test SET_NR_COUNTERS " Akihiko Odaki
2026-07-20 6:08 ` sashiko-bot
2026-07-20 5:37 ` [PATCH v9 05/16] KVM: arm64: PMU: Keep implemented counter mask EL-independent Akihiko Odaki
2026-07-20 5:53 ` sashiko-bot [this message]
2026-07-20 5:38 ` [PATCH v9 06/16] KVM: arm64: PMU: Recreate events after MDCR_EL2 changes Akihiko Odaki
2026-07-20 5:57 ` sashiko-bot
2026-07-20 5:38 ` [PATCH v9 07/16] tools headers: Use u* types for bitfield helpers Akihiko Odaki
2026-07-20 5:38 ` [PATCH v9 08/16] KVM: arm64: selftests: Cover PMU state in MDCR_EL2 Akihiko Odaki
2026-07-20 5:38 ` [PATCH v9 09/16] arm64: errata: Require Apple IMPDEF PMUv3 traps on all CPUs Akihiko Odaki
2026-07-20 6:01 ` sashiko-bot
2026-07-20 5:38 ` [PATCH v9 10/16] KVM: arm64: Don't clear vcpu->cpu in kvm_arch_vcpu_put() Akihiko Odaki
2026-07-20 5:38 ` [PATCH v9 11/16] KVM: arm64: PMU: Protect the list of PMUs with RCU Akihiko Odaki
2026-07-20 5:38 ` [PATCH v9 12/16] KVM: arm64: PMU: Pass the pPMU to kvm_map_pmu_event() Akihiko Odaki
2026-07-20 6:03 ` sashiko-bot
2026-07-20 5:38 ` [PATCH v9 13/16] KVM: arm64: PMU: Pass the target CPU to kvm_pmu_probe_armpmu() Akihiko Odaki
2026-07-20 5:38 ` [PATCH v9 14/16] KVM: arm64: PMU: Implement fixed-counters-only emulation Akihiko Odaki
2026-07-20 6:17 ` sashiko-bot
2026-07-20 5:38 ` [PATCH v9 15/16] KVM: arm64: PMU: Introduce FIXED_COUNTERS_ONLY Akihiko Odaki
2026-07-20 5:38 ` [PATCH v9 16/16] KVM: arm64: selftests: Test PMU_V3_FIXED_COUNTERS_ONLY Akihiko Odaki
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260720055324.149651F000E9@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.linux.dev \
--cc=maz@kernel.org \
--cc=odaki@rsg.ci.i.u-tokyo.ac.jp \
--cc=oupton@kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox