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Wed, 29 Jul 2026 05:07:39 -0700 (PDT) From: "Bingyu.Xian" To: Anup Patel Cc: Atish Patra , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Quan Zhou , stable@vger.kernel.org Subject: [PATCH v3 0/3] RISC-V: KVM: G-stage fault path fix and cleanup Date: Wed, 29 Jul 2026 20:07:30 +0800 Message-ID: <20260729120733.829457-1-shanbeeyoo@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260729075230.743030-1-shanbeeyoo@gmail.com> References: <20260729075230.743030-1-shanbeeyoo@gmail.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Three small changes to the RISC-V G-stage page fault path, sent as separate patches per review feedback. 1/3: Treat -EEXIST from kvm_riscv_gstage_map_page() as a quiet success, aligning RISC-V with x86 and arm64. Real bug fix; Fixes: 9d05c1fee837, Cc: stable. 2/3: vma_pageshift: short -> unsigned int. No-functional-change type cleanup in preparation for sharing a common struct kvm_page_fault across architectures. 3/3: Widen the G-stage fault address to gpa_t end to end -- the local in gstage_page_fault(), the (gpa_t) cast before the <<2 shift, and the fault_addr parameters of kvm_riscv_vcpu_mmio_load/ store(). This completes the RV32 34-bit GPA fix that v2 only half-addressed: v2 widened the local and cast the shift, but the address was still narrowed to 32 bits at the MMIO handler call (unsigned long parameter), aliasing accesses above 4 GB into the low 4 GB. The handlers' internal uses (run->mmio.phys_addr is __u64, kvm_io_bus_read/write() take gpa_t) are already 64-bit. Also in preparation for sharing a common struct kvm_page_fault. No functional change on RV64. Not Cc'd to stable: RV32 KVM is unsupported and this is untested at runtime. Changes since v2 [1]: - Split into separate patches per feedback. - Completed the fault_addr widening v2 left half-done: widened the kvm_riscv_vcpu_mmio_load/store() fault_addr parameters to gpa_t so the 34-bit address is not truncated at the MMIO handler call. The KVM_MEM_USERFAULT port that motivated this cleanup will follow as a separate RFC. [1] https://lore.kernel.org/kvm/20260729075230.743030-1-shanbeeyoo@gmail.com/ Bingyu.Xian (3): RISC-V: KVM: Treat -EEXIST from G-stage map as success RISC-V: KVM: Use unsigned int for vma_pageshift RISC-V: KVM: Widen G-stage fault address to gpa_t arch/riscv/include/asm/kvm_vcpu_insn.h | 4 ++-- arch/riscv/kvm/mmu.c | 8 +++++--- arch/riscv/kvm/vcpu_exit.c | 5 +++-- arch/riscv/kvm/vcpu_insn.c | 4 ++-- 4 files changed, 12 insertions(+), 9 deletions(-) -- 2.54.0