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client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by BL6PEPF00020E65.mail.protection.outlook.com (10.167.249.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.292.8 via Frontend Transport; Tue, 4 Aug 2026 23:58:41 +0000 Received: from dryer.amd.com (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.41; Tue, 4 Aug 2026 18:58:40 -0500 From: Kim Phillips To: , , , CC: Sean Christopherson , Paolo Bonzini , K Prateek Nayak , "Nikunj A Dadhania" , Tom Lendacky , "Michael Roth" , Borislav Petkov , Borislav Petkov , Naveen Rao , David Kaplan , Pawan Gupta , "Dave Hansen" , Kim Phillips Subject: [PATCH v4 10/10] KVM: SEV: Add support for SNP BTB Isolation Date: Tue, 4 Aug 2026 18:56:11 -0500 Message-ID: <20260804235611.4053375-11-kim.phillips@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260804235611.4053375-1-kim.phillips@amd.com> References: <20260804235611.4053375-1-kim.phillips@amd.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00020E65:EE_|PH0PR12MB7983:EE_ X-MS-Office365-Filtering-Correlation-Id: 6712bfc7-fb64-42a0-fc67-08def2844f4e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|23010399003|36860700016|1800799024|82310400026|13003099007|3023799007|6133799003|56012099006|5023799004|11063799006|10067099003|22082099003|18002099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 4Xbzc6ipmo1RX03vy4l+Rgcf+OiFyJShnTlhqtcb4hYso4NMpek/J52X18Ewy7a8X2NEnAwsgAcz2vGFvFWO13xzWCvI3XDsEIvpYG7u19bl4OoK5hMPQkiVEr7SM6TefruxadXijBEm/gIz0w0byQ1yrokcnjEsh3Xy53UO3c/RVAEaWe6LpdXYa7pbn5T5MQsT0VgknwMkBBXHAQElyIalm4+y4WDskRELEnqXLtv5jooOlrBocLY54GRheWCPeBErGwV6ChmgMsmeGoBDNO0AaHyNSfzCAUYsnirdiaGEvy9GBAPiNr8DZuPA4B0DZqmKS5G03XIi8dr2UWiMsaGWOQ6CwD4DODlTNW7CGCZhJwl2kgo39Gmu+LfYpRJD9tJa/7weiJlhf/6BhugrRMrraeKBmdwWYbmLaHZAsRuO1ZV8XeJZQpH8yr3fKBqJ X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Aug 2026 23:58:41.2917 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6712bfc7-fb64-42a0-fc67-08def2844f4e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00020E65.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB7983 Advertise support for BTB Isolation via SEV_VMSA_FEATURES when SNP is enabled. BTB Isolation is an optional feature that can be enabled by the guest to ensure its guest Branch Target Buffers (BTBs) are not affected by any context outside that guest. SNP-active guests may choose to enable the Branch Target Buffer Isolation mode through SEV_FEATURES bit 7 (BTBIsolation). Unlike the sibling features advertised here (Secure TSC, IBPB-on-Entry), BTB Isolation is advertised unconditionally. This is deliberate, not an oversight: the AMD64 APM (Vol. 2, Section 15.36.17 "Side-Channel Protection") defines BTB Isolation as architecturally present on every SEV-SNP-capable processor. There is therefore no host enumeration bit for it (no CPUID leaf or MSR capability), by design -- unlike IBPB-on-Entry, whose host support is enumerated via CPUID Fn8000_001F[IbpbOnEntry] bit 31 precisely because it is not universal. A per-feature host gate is thus neither possible nor meaningful; if SNP is supported, BTB Isolation is present. Also add SVM_SEV_FEAT_BTB_ISOLATION to the sev_init2 selftest's SNP_ONLY_FEATURES and KNOWN_FEATURES to validate it is accepted for SNP guests and rejected for SEV-ES. For more info, refer to page 615, Section 15.36.17 "Side-Channel Protection", AMD64 Architecture Programmer's Manual Volume 2: System Programming Part 2, Pub. 24593 Rev. 3.42 - March 2024 (see Link). Link: https://bugzilla.kernel.org/attachment.cgi?id=306250 Cc: Sean Christopherson Cc: Borislav Petkov (AMD) Signed-off-by: Kim Phillips Assisted-by: ClaudeCode:claude-opus-4-7 --- arch/x86/include/asm/svm.h | 2 ++ arch/x86/kvm/svm/sev.c | 7 ++++++- tools/testing/selftests/kvm/x86/sev_init2_tests.c | 2 ++ 3 files changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h index 9d8107824d10..0da2234b71c6 100644 --- a/arch/x86/include/asm/svm.h +++ b/arch/x86/include/asm/svm.h @@ -309,10 +309,12 @@ static_assert((X2AVIC_4K_MAX_PHYSICAL_ID & AVIC_PHYSICAL_MAX_INDEX_MASK) == X2AV #define SVM_SEV_FEAT_RESTRICTED_INJECTION BIT_ULL(3) #define SVM_SEV_FEAT_ALTERNATE_INJECTION BIT_ULL(4) #define SVM_SEV_FEAT_DEBUG_SWAP BIT_ULL(5) +#define SVM_SEV_FEAT_BTB_ISOLATION BIT_ULL(7) #define SVM_SEV_FEAT_SECURE_TSC BIT_ULL(9) #define SVM_SEV_FEAT_IBPB_ON_ENTRY BIT_ULL(21) #define SVM_SEV_FEAT_SNP_ONLY_MASK (SVM_SEV_FEAT_SNP_ACTIVE | \ + SVM_SEV_FEAT_BTB_ISOLATION | \ SVM_SEV_FEAT_SECURE_TSC | \ SVM_SEV_FEAT_IBPB_ON_ENTRY) diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c index 85a692840886..ee14795a20bd 100644 --- a/arch/x86/kvm/svm/sev.c +++ b/arch/x86/kvm/svm/sev.c @@ -3220,7 +3220,12 @@ void __init sev_hardware_setup(void) sev_supported_vmsa_features |= SVM_SEV_FEAT_DEBUG_SWAP; if (sev_snp_enabled) { - sev_supported_vmsa_features |= SVM_SEV_FEAT_SNP_ACTIVE; + /* + * Some SNP-only features such as BTB Isolation are + * available on all systems that support SNP. + */ + sev_supported_vmsa_features |= SVM_SEV_FEAT_SNP_ACTIVE | + SVM_SEV_FEAT_BTB_ISOLATION; if (tsc_khz && cpu_feature_enabled(X86_FEATURE_SNP_SECURE_TSC)) sev_supported_vmsa_features |= SVM_SEV_FEAT_SECURE_TSC; diff --git a/tools/testing/selftests/kvm/x86/sev_init2_tests.c b/tools/testing/selftests/kvm/x86/sev_init2_tests.c index ff4322a940c6..cf21bfffacb6 100644 --- a/tools/testing/selftests/kvm/x86/sev_init2_tests.c +++ b/tools/testing/selftests/kvm/x86/sev_init2_tests.c @@ -15,11 +15,13 @@ #define SVM_SEV_FEAT_SNP_ACTIVE BIT_ULL(0) #define SVM_SEV_FEAT_DEBUG_SWAP BIT_ULL(5) +#define SVM_SEV_FEAT_BTB_ISOLATION BIT_ULL(7) #define SVM_SEV_FEAT_SECURE_TSC BIT_ULL(9) #define SVM_SEV_FEAT_IBPB_ON_ENTRY BIT_ULL(21) /* Features valid only for SNP guests, rejected for SEV-ES and below. */ #define SNP_ONLY_FEATURES (SVM_SEV_FEAT_SNP_ACTIVE | \ + SVM_SEV_FEAT_BTB_ISOLATION | \ SVM_SEV_FEAT_SECURE_TSC | \ SVM_SEV_FEAT_IBPB_ON_ENTRY) -- 2.43.0