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Wed, 26 Aug 2026 22:36:59 +0000 Received: from dryer.amd.com (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.45; Wed, 26 Aug 2026 17:36:57 -0500 From: Kim Phillips To: , , , CC: Sean Christopherson , Paolo Bonzini , K Prateek Nayak , "Nikunj A Dadhania" , Tom Lendacky , "Michael Roth" , Borislav Petkov , Borislav Petkov , Naveen Rao , David Kaplan , Pawan Gupta , "Dave Hansen" , Kim Phillips , Nathan Fontenot Subject: [PATCH v5 7/8] KVM: SEV: Add support for IBPB-on-Entry Date: Wed, 26 Aug 2026 17:35:09 -0500 Message-ID: <20260826223510.3669875-8-kim.phillips@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260826223510.3669875-1-kim.phillips@amd.com> References: <20260826223510.3669875-1-kim.phillips@amd.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF00022BBB:EE_|DS0PR12MB7873:EE_ X-MS-Office365-Filtering-Correlation-Id: 8e3b7632-6408-4e26-f9dc-08df03c28abf X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700016|23010399003|376014|82310400026|10067099003|5023799004|11063799006|56012099006|6133799003|22082099003|18002099003|13003099007; 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By invoking an Indirect Branch Prediction Barrier (IBPB) on VMRUN, old indirect branch predictions are prevented from influencing indirect branches within the guest. SNP guests may choose to enable IBPB-on-Entry by setting SEV_FEATURES bit 21 (IbpbOnEntry). Host support for IBPB on Entry is indicated by CPUID Fn8000_001F_EAX[IbpbOnEntry], bit 31. If supported, indicate support for IBPB on Entry in sev_supported_vmsa_features bit 21 (IbpbOnEntry). Also add SVM_SEV_FEAT_IBPB_ON_ENTRY to the sev_init2 selftest's SNP_ONLY_FEATURES and KNOWN_FEATURES to validate it is accepted for SNP guests and rejected for SEV-ES. For more info, refer to page 615, Section 15.36.17 "Side-Channel Protection", AMD64 Architecture Programmer's Manual Volume 2: System Programming Part 2, Pub. 24593 Rev. 3.42 - March 2024 (see Link). Link: https://bugzilla.kernel.org/attachment.cgi?id=306250 Cc: Sean Christopherson Cc: Borislav Petkov (AMD) Signed-off-by: Kim Phillips Assisted-by: ClaudeCode:claude-opus-4-7 --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/include/asm/svm.h | 4 +++- arch/x86/kvm/svm/sev.c | 3 +++ tools/arch/x86/include/asm/cpufeatures.h | 1 + tools/testing/selftests/kvm/x86/sev_init2_tests.c | 4 +++- 5 files changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index f70ee74b5f92..3aad2b53f59b 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -472,6 +472,7 @@ #define X86_FEATURE_ALLOWED_SEV_FEATURES (19*32+27) /* Allowed SEV Features */ #define X86_FEATURE_SVSM (19*32+28) /* "svsm" SVSM present */ #define X86_FEATURE_HV_INUSE_WR_ALLOWED (19*32+30) /* Allow Write to in-use hypervisor-owned pages */ +#define X86_FEATURE_SNP_IBPB_ON_ENTRY (19*32+31) /* SEV-SNP IBPB on VM Entry */ /* AMD-defined Extended Feature 2 EAX, CPUID level 0x80000021 (EAX), word 20 */ #define X86_FEATURE_NO_NESTED_DATA_BP (20*32+ 0) /* No Nested Data Breakpoints */ diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h index facabba26a91..9d8107824d10 100644 --- a/arch/x86/include/asm/svm.h +++ b/arch/x86/include/asm/svm.h @@ -310,9 +310,11 @@ static_assert((X2AVIC_4K_MAX_PHYSICAL_ID & AVIC_PHYSICAL_MAX_INDEX_MASK) == X2AV #define SVM_SEV_FEAT_ALTERNATE_INJECTION BIT_ULL(4) #define SVM_SEV_FEAT_DEBUG_SWAP BIT_ULL(5) #define SVM_SEV_FEAT_SECURE_TSC BIT_ULL(9) +#define SVM_SEV_FEAT_IBPB_ON_ENTRY BIT_ULL(21) #define SVM_SEV_FEAT_SNP_ONLY_MASK (SVM_SEV_FEAT_SNP_ACTIVE | \ - SVM_SEV_FEAT_SECURE_TSC) + SVM_SEV_FEAT_SECURE_TSC | \ + SVM_SEV_FEAT_IBPB_ON_ENTRY) #define VMCB_ALLOWED_SEV_FEATURES_VALID BIT_ULL(63) diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c index 6cfb7496415e..20a761cf3491 100644 --- a/arch/x86/kvm/svm/sev.c +++ b/arch/x86/kvm/svm/sev.c @@ -3262,6 +3262,9 @@ void __init sev_hardware_setup(void) if (tsc_khz && cpu_feature_enabled(X86_FEATURE_SNP_SECURE_TSC)) sev_supported_vmsa_features |= SVM_SEV_FEAT_SECURE_TSC; + + if (cpu_feature_enabled(X86_FEATURE_SNP_IBPB_ON_ENTRY)) + sev_supported_vmsa_features |= SVM_SEV_FEAT_IBPB_ON_ENTRY; } } diff --git a/tools/arch/x86/include/asm/cpufeatures.h b/tools/arch/x86/include/asm/cpufeatures.h index 6547c0aee45b..634cd09366da 100644 --- a/tools/arch/x86/include/asm/cpufeatures.h +++ b/tools/arch/x86/include/asm/cpufeatures.h @@ -460,6 +460,7 @@ #define X86_FEATURE_ALLOWED_SEV_FEATURES (19*32+27) /* Allowed SEV Features */ #define X86_FEATURE_SVSM (19*32+28) /* "svsm" SVSM present */ #define X86_FEATURE_HV_INUSE_WR_ALLOWED (19*32+30) /* Allow Write to in-use hypervisor-owned pages */ +#define X86_FEATURE_SNP_IBPB_ON_ENTRY (19*32+31) /* SEV-SNP IBPB on VM Entry */ /* AMD-defined Extended Feature 2 EAX, CPUID level 0x80000021 (EAX), word 20 */ #define X86_FEATURE_NO_NESTED_DATA_BP (20*32+ 0) /* No Nested Data Breakpoints */ diff --git a/tools/testing/selftests/kvm/x86/sev_init2_tests.c b/tools/testing/selftests/kvm/x86/sev_init2_tests.c index d70482e07141..f2f97dca3935 100644 --- a/tools/testing/selftests/kvm/x86/sev_init2_tests.c +++ b/tools/testing/selftests/kvm/x86/sev_init2_tests.c @@ -16,10 +16,12 @@ #define SVM_SEV_FEAT_SNP_ACTIVE BIT_ULL(0) #define SVM_SEV_FEAT_DEBUG_SWAP BIT_ULL(5) #define SVM_SEV_FEAT_SECURE_TSC BIT_ULL(9) +#define SVM_SEV_FEAT_IBPB_ON_ENTRY BIT_ULL(21) /* Features valid only for SNP guests, rejected for SEV-ES and below. */ #define SNP_ONLY_FEATURES (SVM_SEV_FEAT_SNP_ACTIVE | \ - SVM_SEV_FEAT_SECURE_TSC) + SVM_SEV_FEAT_SECURE_TSC | \ + SVM_SEV_FEAT_IBPB_ON_ENTRY) /* * Some features may have hidden dependencies, or may only work -- 2.43.0