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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by CH2PEPF00000148.mail.protection.outlook.com (10.167.244.105) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.382.8 via Frontend Transport; Tue, 1 Sep 2026 09:34:09 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.46; Tue, 1 Sep 2026 02:33:50 -0700 Received: from NV-2Y5XW94.nvidia.com (10.126.230.37) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.46; Tue, 1 Sep 2026 02:33:48 -0700 From: Shameer Kolothum To: , , CC: , , , , , , , , Subject: [RFC PATCH 10/19] vfio/pci: Serialize hot reset with recovery Date: Tue, 1 Sep 2026 10:32:08 +0100 Message-ID: <20260901093217.8539-11-skolothumtho@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260901093217.8539-1-skolothumtho@nvidia.com> References: <20260901093217.8539-1-skolothumtho@nvidia.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH2PEPF00000148:EE_|DS0PR12MB8788:EE_ X-MS-Office365-Filtering-Correlation-Id: 4ec9f7c3-d9f1-4ab0-a22f-08df080c2d26 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|23010399003|82310400026|376014|1800799024|56012099006|10067099003|5023799004|11063799006|22082099003|18002099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: IHMazd3qewQKMo7+xkLEjfpOeA03XMQ8Xw18c+99oRd7tz5GjcA8yB3e6FnmU7HxPbnDuJgXJk2SLiv8bxGaLDvq5zUiIi7R59hX3d06C00hQ2yhVpkAVnqddRsbbDoTM3wi35DBPKu7l+7vAP/W3i3hUgJ0bR+tY6JlLSFXCjpCLcU2REiSH1otDTbhXYxR48lXTrf0btMH5rhq2nd5Ejy2XwnQDyyLKUwj6Bq1XyNxuIZOAojp4RAuZig8pSdmkRVDIBBL8dGxvnLd1hn4aoquaDSdMHkQXwVjM49+zWmPqxEpt6b/ZZRs2LliQXwYKNPg5DEIxW791yN//fMImymnKdqO13ANV9zYO3j+BA03mSakppEr1LHGg3ZS13oj2EjLMgkgs8pT1ffERnu6gKLz1l2qvmP1qaLBRK0gWu45d4EzBQhAe29k4a+t8iiv X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Sep 2026 09:34:09.8434 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4ec9f7c3-d9f1-4ab0-a22f-08df080c2d26 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH2PEPF00000148.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8788 Refuse a user hot reset while a recovery transaction blocks access to any device in the set. Between the AER callbacks memory_lock is not held, so access_blocked is the only thing marking the device as unavailable. A device which has failed for good is let through. Nothing is running on its behalf, and a hot reset covers the whole set, so refusing there would stop a healthy sibling from being reset because an unrelated device errored. The failed device stays blocked either way, since the reset does not clear access_blocked once FAILED is set. Do not hold recovery_lock while resetting. pci_reset_bus() reaches pci_bridge_wait_for_secondary_bus(), which takes pci_bus_sem, and AER already holds pci_bus_sem when it enters the driver and takes recovery_lock. Holding recovery_lock across the reset would invert that order for every device in the set. Assisted-by: Claude:claude-opus-5 Signed-off-by: Shameer Kolothum --- drivers/vfio/pci/vfio_pci_core.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c index 876ff51d6987..bd3d79d28f27 100644 --- a/drivers/vfio/pci/vfio_pci_core.c +++ b/drivers/vfio/pci/vfio_pci_core.c @@ -2937,6 +2937,27 @@ static int vfio_pci_dev_set_hot_reset(struct vfio_device_set *dev_set, break; } + /* + * Between the AER callbacks memory_lock is not held, so refuse + * the reset on access_blocked as well. Read it rather than + * take recovery_lock, which would have to be released before + * pci_reset_bus() anyway since that reaches pci_bus_sem. + * + * Let a device which has failed for good through. Nothing is + * running on its behalf, and this reset covers the whole set, + * so refusing there would stop a healthy sibling from being + * reset because an unrelated device errored. The failed one + * stays blocked, since the reset does not unblock a device + * with FAILED set. + */ + if (vdev->pci_recovery_supported && + READ_ONCE(vdev->pci_recovery_access_blocked) && + !(READ_ONCE(vdev->pci_recovery_flags) & + VFIO_PCI_RECOVERY_FAILED)) { + ret = -EBUSY; + break; + } + /* * Take the memory write lock for each device and zap BAR * mappings to prevent the user accessing the device while in -- 2.43.0