From: sashiko-bot@kernel.org
To: "Tina Zhang" <zhang_wei@open-hieco.net>
Cc: kvm@vger.kernel.org
Subject: Re: [PATCH v8 7/8] KVM: nSVM: Advertise DecodeAssists to L1
Date: Wed, 23 Sep 2026 14:34:15 +0000 [thread overview]
Message-ID: <20260923143415.94C3F1F000FF@smtp.kernel.org> (raw)
In-Reply-To: <46c9cf5d4b347b0147f9fb7781a06e0eaa8918a9.1790171702.git.zhang_wei@open-hieco.net>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] kvm: nSVM: missing CR_VALID bit in exit_info_1 for synthesized DR intercepts
--
commit 442db7fa42ab1144e62575ec3079cbc2d2e5ea40
Author: Tina Zhang <zhang_wei@open-hieco.net>
KVM: nSVM: Advertise DecodeAssists to L1
Advertise DecodeAssists to L1 now that KVM virtualizes the guest-visible
DecodeAssist state in VMCB12: EXITINFO1 decode data for MOV CR/DR, INTn,
and INVLPG exits. Expose the feature only when supported by hardware, as
KVM still relies on hardware DecodeAssists for VM-Exits that are reflected
directly from L2.
> diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
> index e83e4e5e7b934..82de844f63ade 100644
> --- a/arch/x86/kvm/svm/svm.c
> +++ b/arch/x86/kvm/svm/svm.c
> @@ -5557,6 +5557,8 @@ static __init void svm_set_cpu_caps(void)
> */
> kvm_cpu_cap_set(X86_FEATURE_FLUSHBYASID);
>
> + kvm_cpu_cap_check_and_set(X86_FEATURE_DECODEASSISTS);
> +
[Severity: Medium]
Will advertising DECODEASSISTS here cause issues for synthesized DR intercepts?
Looking at svm_check_intercept() in arch/x86/kvm/svm/svm.c, when an L2 guest
executes a MOV DRx instruction with decode assists enabled, KVM synthesizes an
intercept but doesn't set the CR_VALID bit (bit 63) in exit_info_1:
case SVM_EXIT_READ_DR0:
case SVM_EXIT_WRITE_DR0:
icpt_info.exit_code += info->modrm_reg;
if (decode_assists)
vmcb->control.exit_info_1 = info->modrm_rm & SVM_EXITINFO_REG_MASK;
break;
Does the AMD APM require bit 63 to be set for DR intercepts? If it does, would
an L1 hypervisor that strictly validates the EXITINFO1 field reject this
synthesized intercept data, leading to emulation fallbacks or failures?
> if (nrips)
> kvm_cpu_cap_set(X86_FEATURE_NRIPS);
>
--
Sashiko AI review · https://sashiko.dev/#/patchset/cover.1790171702.git.zhang_wei@open-hieco.net?part=7
next prev parent reply other threads:[~2026-09-23 14:34 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-23 14:02 [PATCH v8 0/8] KVM: nSVM: Enable DecodeAssists for nested guests Tina Zhang
2026-09-23 14:02 ` [PATCH v8 1/8] KVM: x86: Provide INVLPG linear address to intercept handlers Tina Zhang
2026-09-23 19:49 ` Jim Mattson
2026-09-23 14:02 ` [PATCH v8 2/8] KVM: nSVM: Synthesize DecodeAssists EXITINFO for emulated intercepts Tina Zhang
2026-09-23 14:02 ` [PATCH v8 3/8] KVM: nSVM: Track valid hardware DecodeAssist bytes Tina Zhang
2026-09-23 14:02 ` [PATCH v8 4/8] KVM: nSVM: Propagate hardware DecodeAssist bytes to VMCB12 Tina Zhang
2026-09-23 14:02 ` [PATCH v8 5/8] KVM: nSVM: Fetch DecodeAssist bytes for synthesized faults Tina Zhang
2026-09-23 22:20 ` Jim Mattson
2026-09-30 12:24 ` Tina Zhang
2026-09-23 14:02 ` [PATCH v8 6/8] KVM: nSVM: Use emulator bytes for synthesized nested #NPF Tina Zhang
2026-09-23 14:02 ` [PATCH v8 7/8] KVM: nSVM: Advertise DecodeAssists to L1 Tina Zhang
2026-09-23 14:34 ` sashiko-bot [this message]
2026-09-23 14:02 ` [PATCH v8 8/8] KVM: selftests: Add nested SVM DecodeAssists test Tina Zhang
2026-09-23 14:37 ` sashiko-bot
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