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From: Jonathan Cameron <jic23@kernel.org>
To: <mhonap@nvidia.com>
Cc: <alex@shazbot.org>, <jgg@ziepe.ca>, <ankita@nvidia.com>,
	<dave.jiang@intel.com>, <alejandro.lucero-palau@amd.com>,
	<smadhavan@nvidia.com>, <corbet@lwn.net>,
	<skhan@linuxfoundation.org>, <dave@stgolabs.net>,
	<alison.schofield@intel.com>, <vishal.l.verma@intel.com>,
	<iweiny@kernel.org>, <ming.li@zohomail.com>, <yishaih@nvidia.com>,
	<skolothumtho@nvidia.com>, <kevin.tian@intel.com>,
	<bhelgaas@google.com>, <dmatlack@google.com>, <kees@kernel.org>,
	<gustavoars@kernel.org>, <cjia@nvidia.com>, <kjaju@nvidia.com>,
	<vsethi@nvidia.com>, <zhiw@nvidia.com>,
	<linux-doc@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<kvm@vger.kernel.org>, <linux-cxl@vger.kernel.org>,
	<linux-pci@vger.kernel.org>, <linux-kselftest@vger.kernel.org>,
	<linux-hardening@vger.kernel.org>
Subject: Re: [PATCH v5 09/27] vfio/pci: Add a generic excluded-range list
Date: Fri, 25 Sep 2026 23:05:28 +0100	[thread overview]
Message-ID: <20260925230528.33f70daf@jic23-hlaptop> (raw)
In-Reply-To: <20260916183540.3813685-10-mhonap@nvidia.com>

On Thu, 17 Sep 2026 00:05:22 +0530
<mhonap@nvidia.com> wrote:

> From: Manish Honap <mhonap@nvidia.com>
> 
> The MSI-X table is virtualized in vfio_pci_bar_rw() by an open-coded
> x_start/x_end window that fills reads with -1 and drops writes. Now that
> a generic excluded-range list expresses the same fill/drop behavior,
> register the MSI-X table as a read and write excluded range instead of
> special-casing it in the read/write path.
> 
> Add the range when the MSI-X capability is parsed in
> vfio_pci_core_enable() and clear the list in vfio_pci_core_disable()
> alongside the config teardown. The read/write path now relies solely on
> vfio_pci_bar_find_exclusion(), so MSI-X and a provider's (e.g. vfio-cxl)
> trapped registers share one mechanism.
> 
> No functional change.
> 
> Assisted-by: LLM
> Signed-off-by: Manish Honap <mhonap@nvidia.com>
A few things inline that might tidy up the implementation and make
it a little more readable. Also you've use object allocators in some
places but not universally.  

Jonathan

> ---
>  drivers/vfio/pci/vfio_pci_core.c | 209 +++++++++++++++++++++++++++++++
>  drivers/vfio/pci/vfio_pci_priv.h |   9 ++
>  drivers/vfio/pci/vfio_pci_rdwr.c |   8 ++
>  include/linux/vfio_pci_core.h    |  14 +++
>  4 files changed, 240 insertions(+)
> 
> diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c
> index 9a75c30b67e2..9e4fa5d088a4 100644
> --- a/drivers/vfio/pci/vfio_pci_core.c
> +++ b/drivers/vfio/pci/vfio_pci_core.c
> @@ -24,6 +24,7 @@
>  #include <linux/pci.h>
>  #include <linux/pm_runtime.h>
>  #include <linux/slab.h>
> +#include <linux/sort.h>
>  #include <linux/types.h>
>  #include <linux/uaccess.h>
>  #include <linux/vgaarb.h>
> @@ -1012,6 +1013,204 @@ static int msix_mmappable_cap(struct vfio_pci_core_device *vdev,
>  	return vfio_info_add_capability(caps, &header, sizeof(header));
>  }
>  
> +struct vfio_pci_excluded_range {
> +	struct list_head	entry;
> +	int			bar;
> +	u64			start;
> +	u64			size;
> +	u32			flags;
> +};
> +
> +int vfio_pci_core_add_excluded_range(struct vfio_pci_core_device *vdev, int bar,
> +				     u64 start, u64 size, u32 flags)
> +{
> +	struct vfio_pci_excluded_range *range;
> +
> +	range = kzalloc_obj(*range);
> +	if (!range)
> +		return -ENOMEM;
> +
I'd be tempted to do kmalloc_obj and
	*range = (struct vfio_pci_excluded_range) {
		.bar = bar,
		.start = start,
		.size = size,
		.flags = flags,
	};
	list_add_tail(...)

> +	range->bar = bar;
> +	range->start = start;
> +	range->size = size;
> +	range->flags = flags;
> +	list_add_tail(&range->entry, &vdev->excluded_ranges);
> +
> +	return 0;
> +}
> +EXPORT_SYMBOL_GPL(vfio_pci_core_add_excluded_range);
> +
> +static void vfio_pci_free_excluded_ranges(struct vfio_pci_core_device *vdev)
> +{
> +	struct vfio_pci_excluded_range *range, *tmp;
> +
> +	list_for_each_entry_safe(range, tmp, &vdev->excluded_ranges, entry) {
> +		list_del(&range->entry);
> +		kfree(range);
> +	}
> +}


> +
> +/* A page-aligned mmap hole, derived from an mmap-excluded range. */
> +struct vfio_pci_mmap_hole {
> +	u64 start;
> +	u64 end;
> +};
This is just a range. Do we need another define for this specific case?

> +/*
> + * Advertise the BAR as mmappable minus every page-aligned mmap-excluded hole.
> + * A BAR can carry several holes at unrelated offsets (for example an MSI-X
> + * table and one or more trapped CXL component sub-blocks, which the CXL spec
> + * locates by pointer, not at fixed offsets).
> + * Collect the holes, page-align and sort them, coalesce any that overlap or
> + * touch, and advertise the gaps.
> + */
> +static int vfio_pci_excluded_sparse_cap(struct vfio_pci_core_device *vdev,
> +					int index, struct vfio_info_cap *caps)
> +{
> +	u64 bar_len = pci_resource_len(vdev->pdev, index);
> +	struct vfio_region_info_cap_sparse_mmap *sparse;
> +	struct vfio_pci_excluded_range *range;
> +	struct vfio_pci_mmap_hole *holes;
> +	int nr_holes = 0, nr_areas = 0, i, j;

Generally avoid mixing declarations with assignment with those that don't
on a single line. It is harder to read than splitting them into each
time of declaration.

> +	size_t size;
> +	u64 pos;
> +	int ret;
> +
> +	list_for_each_entry(range, &vdev->excluded_ranges, entry)
> +		if (range->bar == index &&
> +		    (range->flags & VFIO_PCI_EXCLUDE_MMAP))
> +			nr_holes++;
> +
> +	if (!nr_holes)
> +		return 0;
> +
	struct vfio_pci_mmap_hole *holes __free(kfree) =
		kzalloc_objs(*holes, nr_holes);
or something like that.  Kees is well his way to getting rid of almost
all places where objects are allocated in non typesafe ways.

> +	holes = kmalloc_array(nr_holes, sizeof(*holes), GFP_KERNEL);
> +	if (!holes)
> +		return -ENOMEM;
> +
> +	/*
> +	 * mmap is page granular, so each hole rounds out to the page boundaries
> +	 * enclosing its excluded sub-range. The byte-granular exclusion still
> +	 * governs the fault and read/write paths; only the advertised mmap areas
> +	 * round to whole pages.
> +	 */
> +	i = 0;
> +	list_for_each_entry(range, &vdev->excluded_ranges, entry) {
> +		if (range->bar != index ||
> +		    !(range->flags & VFIO_PCI_EXCLUDE_MMAP))
> +			continue;

		holes[i++] = (struct vfio_pci_mmap_hole) {
			.start = ALIGN_DOWN(range->start, PAGE_SIZE),
			.end = ALIGN(range->start + range->size, PAGE_SIZE),
		};

Mind you vfio_pci_mmap_hole seems a lot like a range. So maybe just use a
struct range then you get 

		holes[i++] = DEFINE_RANGE(ALIGN_DOWN(range->start, PAGE_SIZE),
					  ALIGN(range->start + range->size, PAGE_SIZE));


> +		holes[i].start = ALIGN_DOWN(range->start, PAGE_SIZE);
> +		holes[i].end = ALIGN(range->start + range->size, PAGE_SIZE);
> +		i++;
> +	}
> +
> +	sort(holes, nr_holes, sizeof(*holes), vfio_pci_mmap_hole_cmp, NULL);
> +
> +	/* Coalesce holes that overlap or touch after page alignment. */
> +	for (i = 0, j = 0; i < nr_holes; i++) {
> +		if (j && holes[i].start <= holes[j - 1].end)
> +			holes[j - 1].end = max(holes[j - 1].end, holes[i].end);
> +		else
> +			holes[j++] = holes[i];
> +	}
> +	nr_holes = j;
> +
> +	/* One mmappable area per gap: before, between, and after the holes. */
> +	for (i = 0, pos = 0; i < nr_holes; i++) {
> +		if (holes[i].start > pos)
> +			nr_areas++;
> +		pos = holes[i].end;
> +	}
> +	if (pos < bar_len)
> +		nr_areas++;
> +
> +	size = struct_size(sparse, areas, nr_areas);

	struct vfio_region_info_cap_sparse_mmap *sparse =
		kzalloc_flex(*sparse, areas, nr_areas);

> +	sparse = kzalloc(size, GFP_KERNEL);
> +	if (!sparse) {
> +		kfree(holes);
with the __free above this can simply return.
> +		return -ENOMEM;
> +	}
> +
> +	sparse->header.id = VFIO_REGION_INFO_CAP_SPARSE_MMAP;
> +	sparse->header.version = 1;
> +	sparse->nr_areas = nr_areas;
> +
> +	for (i = 0, j = 0, pos = 0; i < nr_holes; i++) {
> +		if (holes[i].start > pos) {
> +			sparse->areas[j].offset = pos;
> +			sparse->areas[j].size = holes[i].start - pos;
> +			j++;
Bit of a long line because of the indent but I'd still go for setting whole
structure in one shot - so something like:

			sparse->areas[j++] = (struct vfio_region_sparse_mmap_area) {
				.offset = pos,
				.size = holes[i].start - pos,
			};
> +		}
> +		pos = holes[i].end;
> +	}
> +	if (pos < bar_len) {
> +		sparse->areas[j].offset = pos;
> +		sparse->areas[j].size = bar_len - pos;

Similar for setting it in one go so we only do the indexing
once + looks more like above (where this trick is more advantageous!)

		sparse->areas[j] = (struct vfio_sparse_mmap_area) {
			.offset = pos,
			.size = bar_len - pos, 
		};


> +	}
> +
> +	kfree(holes);

This looks like a good place to use __free magic to simplify things.

> +	ret = vfio_info_add_capability(caps, &sparse->header, size);
> +	kfree(sparse);
> +	return ret;
> +}
> +



  parent reply	other threads:[~2026-09-25 22:05 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-16 18:35 [PATCH v5 00/27] vfio/pci: Add CXL Type-2 device passthrough support mhonap
2026-09-16 18:35 ` [PATCH v5 01/27] cxl/regs: Split the BAR block request and ioremap helpers mhonap
2026-09-22  1:28   ` Jonathan Cameron
2026-09-16 18:35 ` [PATCH v5 02/27] cxl/regs: Let a BAR-owning driver own the component register block mhonap
2026-09-22  1:36   ` Jonathan Cameron
2026-09-16 18:35 ` [PATCH v5 03/27] cxl: Move component register defines to uapi/cxl/cxl_regs.h mhonap
2026-09-22  1:43   ` Jonathan Cameron
2026-09-16 18:35 ` [PATCH v5 04/27] cxl: Add cxl_reset_dvsec_sequence() for vfio-pci mhonap
2026-09-25 20:41   ` Jonathan Cameron
2026-09-16 18:35 ` [PATCH v5 05/27] vfio/pci: Add the CXL provider ops registration interface mhonap
2026-09-16 18:35 ` [PATCH v5 06/27] vfio/pci: Detect CXL devices and load the CXL provider on demand mhonap
2026-09-17  8:48   ` Richard Cheng
2026-09-21 10:05     ` Manish Honap
2026-09-16 18:35 ` [PATCH v5 07/27] vfio/pci: Honor -EPROBE_DEFER from CXL provider probe mhonap
2026-09-16 18:35 ` [PATCH v5 08/27] vfio/pci: Fall back to plain vfio-pci when CXL init fails mhonap
2026-09-22  2:15   ` Alex Williamson
2026-09-16 18:35 ` [PATCH v5 09/27] vfio/pci: Add a generic excluded-range list mhonap
2026-09-22  2:13   ` Alex Williamson
2026-09-25 22:05   ` Jonathan Cameron [this message]
2026-09-16 18:35 ` [PATCH v5 10/27] vfio/pci: Migrate MSI-X exclusion onto the " mhonap
2026-09-16 18:35 ` [PATCH v5 11/27] vfio/pci: Virtualize the CXL DVSEC in vfio_pci_config.c mhonap
2026-09-22  2:14   ` Alex Williamson
2026-09-25 22:15   ` Jonathan Cameron
2026-09-16 18:35 ` [PATCH v5 12/27] vfio/pci: Call the CXL open and close hooks around device use mhonap
2026-09-25 22:17   ` Jonathan Cameron
2026-09-16 18:35 ` [PATCH v5 13/27] vfio/pci: Bracket PCI resets with the CXL reset hooks mhonap
2026-09-22  2:14   ` Alex Williamson
2026-09-16 18:35 ` [PATCH v5 14/27] vfio/pci: Provide an opt-out for the CXL Type-2 extensions mhonap
2026-09-16 18:35 ` [PATCH v5 15/27] vfio/cxl: Add the vfio-cxl provider module skeleton mhonap
2026-09-16 18:35 ` [PATCH v5 16/27] vfio/cxl: Create the CXL memdev and set media ready at bind mhonap
2026-09-22  2:14   ` Alex Williamson
2026-09-25 22:22   ` Jonathan Cameron
2026-09-16 18:35 ` [PATCH v5 17/27] vfio/cxl: Own the whole component register BAR mhonap
2026-09-22  2:14   ` Alex Williamson
2026-09-16 18:35 ` [PATCH v5 18/27] vfio/cxl: Expose the HDM memory region to the guest mhonap
2026-09-22  2:14   ` Alex Williamson
2026-09-16 18:35 ` [PATCH v5 19/27] vfio/cxl: Contain HDM memory errors with memory_failure() mhonap
2026-09-16 18:35 ` [PATCH v5 20/27] vfio/cxl: Expose the HDM decoder registers read-only to the guest mhonap
2026-09-22  2:13   ` Alex Williamson
2026-09-16 18:35 ` [PATCH v5 21/27] vfio/cxl: Exclude the HDM decoder registers from direct BAR access mhonap
2026-09-17  7:28   ` Richard Cheng
2026-09-21  9:52     ` Manish Honap
2026-09-16 18:35 ` [PATCH v5 22/27] vfio/cxl: Clear the HDM access gate after a hot reset mhonap
2026-09-22  2:13   ` Alex Williamson
2026-09-16 18:35 ` [PATCH v5 23/27] vfio/cxl: Describe the CXL device and decoder geometry to userspace mhonap
2026-09-16 18:35 ` [PATCH v5 24/27] vfio/cxl: Export the HDM memory region as a dma-buf mhonap
2026-09-17  7:55   ` Richard Cheng
2026-09-21  9:58     ` Manish Honap
2026-09-16 18:35 ` [PATCH v5 25/27] vfio/cxl: Run the CXL reset at the vfio reset points mhonap
2026-09-17  8:11   ` Richard Cheng
2026-09-21 10:01     ` Manish Honap
2026-09-22  2:13   ` Alex Williamson
2026-09-16 18:35 ` [PATCH v5 26/27] Documentation: vfio-pci: Document CXL Type-2 device passthrough mhonap
2026-09-16 19:33   ` Gregory Price
2026-09-21  9:43     ` Manish Honap
2026-09-24  0:54       ` Jonathan Cameron
2026-09-16 18:35 ` [PATCH v5 27/27] selftests/vfio: Add CXL Type-2 passthrough tests mhonap

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