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Iglesias" , Pierrick Bouvier , Fabiano Rosas , Laurent Vivier , Paolo Bonzini , Alistair Francis , Peter Maydell , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , qemu-arm@nongnu.org, kvm@vger.kernel.org Subject: [PATCH v4 01/55] target-info: Introduce target_riscv32 Date: Sat, 26 Sep 2026 15:00:00 +0800 Message-ID: <20260926070057.1234-2-luoyonggang@gmail.com> X-Mailer: git-send-email 2.52.0.windows.1 In-Reply-To: <20260926070057.1234-1-luoyonggang@gmail.com> References: <20260926070057.1234-1-luoyonggang@gmail.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Anton Johansson via qemu development Will be used in the following commit to filter machines using TypeInfo::is_available, so a simple !target_riscv64() is not sufficient. Reviewed-by: Pierrick Bouvier Signed-off-by: Anton Johansson --- include/qemu/target-info.h | 7 +++++++ target-info.c | 5 +++++ 2 files changed, 12 insertions(+) diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h index b23e5bc5865..c09e5d2a3ec 100644 --- a/include/qemu/target-info.h +++ b/include/qemu/target-info.h @@ -91,6 +91,13 @@ bool target_ppc64(void); */ bool target_s390x(void); +/** + * target_riscv32: + * + * Returns whether the target architecture is riscv32 + */ +bool target_riscv32(void); + /** * target_riscv64: * diff --git a/target-info.c b/target-info.c index 012b384036d..bba4503151a 100644 --- a/target-info.c +++ b/target-info.c @@ -89,6 +89,11 @@ bool target_s390x(void) return target_arch() == SYS_EMU_TARGET_S390X; } +bool target_riscv32(void) +{ + return target_arch() == SYS_EMU_TARGET_RISCV32; +} + bool target_riscv64(void) { return target_arch() == SYS_EMU_TARGET_RISCV64; -- 2.52.0.windows.1