From: sashiko-bot@kernel.org
To: "Guanghui Feng" <guanghuifeng@linux.alibaba.com>
Cc: kvm@vger.kernel.org
Subject: Re: [PATCH v3 1/2] iommu: Add iommu_get_pci_resv_windows() helper
Date: Sun, 04 Oct 2026 16:31:52 +0000 [thread overview]
Message-ID: <20261004163153.509141F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20261004162213.3787623-2-guanghuifeng@linux.alibaba.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] iommu: integer truncation of PCI MMIO window length on 32-bit systems
--
commit 913f9140edb50fcf9c22ac52938eee20ee68edc7
Author: Guanghui Feng <guanghuifeng@linux.alibaba.com>
iommu: Add iommu_get_pci_resv_windows() helper
This commit adds a common helper that walks a PCI device's host bridge MMIO
windows and returns them as IOMMU_RESV_RESERVED regions in a list. It
provides a reusable interface for subsystems that need visibility into PCI
host bridge MMIO address ranges, such as iommufd.
> diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
> index b486b8bbd1fcd..be774edef550f 100644
> --- a/drivers/iommu/iommu.c
> +++ b/drivers/iommu/iommu.c
[ ... ]
> @@ -945,6 +945,63 @@ iommu_insert_device_resv_regions(struct list_head *dev_resv_regions,
> return ret;
> }
>
> +#ifdef CONFIG_PCI
> +/**
> + * iommu_get_pci_resv_windows - collect PCI host bridge MMIO windows as
> + * reserved regions
[ ... ]
> +int iommu_get_pci_resv_windows(struct pci_dev *dev, struct list_head *head)
> +{
> + struct pci_host_bridge *bridge = pci_find_host_bridge(dev->bus);
> + struct iommu_resv_region *region, *next;
> + struct resource_entry *window;
> + LIST_HEAD(resv_windows);
> + int ret;
> +
> + if (!bridge)
> + return -ENODEV;
> +
> + resource_list_for_each_entry(window, &bridge->windows) {
> + struct iommu_resv_region tmp = {
> + .type = IOMMU_RESV_RESERVED,
> + };
> +
> + if (resource_type(window->res) != IORESOURCE_MEM)
> + continue;
> +
> + tmp.start = window->res->start - window->offset;
> + tmp.length = window->res->end - window->res->start + 1;
[Severity: Medium]
On 32-bit systems with 64-bit physical addressing (e.g. ARM LPAE or x86 PAE),
if a PCI host bridge has an MMIO window larger than 4GB, does this implicitly
truncate the 64-bit resource_size_t value into the 32-bit size_t length field
of struct iommu_resv_region?
This truncation could allow IOVA allocations to overlap with PCI MMIO windows,
leading to IOMMU faults, unexpected peer-to-peer routing, and potential memory
corruption.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261004162213.3787623-2-guanghuifeng@linux.alibaba.com?part=1
next prev parent reply other threads:[~2026-10-04 16:31 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-21 7:02 [PATCH] iommu: Reserve PCI host bridge MMIO windows in group reserved regions Guanghui Feng
2026-09-21 7:15 ` sashiko-bot
2026-09-21 10:39 ` [PATCH v2 0/2] iommu: Reserve PCI host bridge MMIO windows for IOVA Guanghui Feng
2026-09-21 10:39 ` [PATCH v2 1/2] iommu: Reserve PCI host bridge MMIO windows in group reserved regions Guanghui Feng
2026-09-21 10:50 ` sashiko-bot
2026-09-21 10:39 ` [PATCH v2 2/2] iommufd: Reserve PCI host bridge MMIO windows in IOAS " Guanghui Feng
2026-09-21 11:24 ` [PATCH v2 0/2] iommu: Reserve PCI host bridge MMIO windows for IOVA Robin Murphy
2026-09-21 11:55 ` Jason Gunthorpe
2026-10-04 16:22 ` [PATCH v3 0/2] iommu/iommufd: Expose PCI host bridge MMIO windows for opt-in IOVA avoidance Guanghui Feng
2026-10-04 16:22 ` [PATCH v3 1/2] iommu: Add iommu_get_pci_resv_windows() helper Guanghui Feng
2026-10-04 16:31 ` sashiko-bot [this message]
2026-10-04 16:22 ` [PATCH v3 2/2] iommufd: Add IOMMU_GET_PCI_MMIO_WINDOWS ioctl Guanghui Feng
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