From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mta1.migadu.com (out-104.mta1.migadu.com [95.215.58.104]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9874040D590 for ; Wed, 7 Oct 2026 07:43:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.104 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791359048; cv=none; b=Lct7g78ElMwm1lXv7eGCqBCefPP0J/XliNoHQIOHw0PBFUGNrrIHiyZLiXao1jSST51IyrAVJYm47zEuMs1iknP9LVIpUEW3xErT1yud5jvn6KSFCjIH8LsirTy7Ie0jMtgDvyuox0+ikHgtGWbReuBC7XSBKdr6k1fAmJ8Tgbg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791359048; c=relaxed/simple; bh=DEbyYnw/QNFLD6hov3Wk8Emu00bFpjJHBWq6l30twn8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=B+KTQQKDB8t6yUMfjfUscA6Ttq8YCMnTXeRimasynKGFTddpXa/rrdYs39ByD5ep0msP7agHe0WjQogy8qVhe+ON5jja7KGLt+4LmODJqjUx9NsUyr7PvlqC5yMxjEtccqWNGl5nxSKqkgiAXBof/fPfbzJTcoG+mEBXhX0egUE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=aGPFpe5P; arc=none smtp.client-ip=95.215.58.104 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="aGPFpe5P" X-Envelope-To: kvm@vger.kernel.org DKIM-Signature: a=rsa-sha256; bh=DEbyYnw/QNFLD6hov3Wk8Emu00bFpjJHBWq6l30twn8=; c=simple/simple; d=linux.dev; h=from:to:subject:date:message-id:mime-version:content-type; s=key1; t=1791359037; v=1; x=1791963837; b=aGPFpe5P2U1a2h5r0OF0MkW5Gu+NyzjGqTEcYXVPnD1iJnlN3MPpEqMtzbiQcDoYtcgpbD+Q Nn1lPFaUInJdTJD1pih9WHXMLkwTLZMvtFdPX8YZ0+lPC3Q/bFRN8SQlNx/tG7yUDuvwL3DSz8Q 6zmEtAaCc3kvI4de2msa+ZpM= X-Envelope-To: kvm@vger.kernel.org Received: by smtp.migadu.com with ESMTPS id e4f7af71e98e56d0; Wed, 07 Oct 2026 07:43:56 +0000 X-Mizu-Trace-ID: e4f7af71e98e56d0 X-Migadu-Flow: FLOW_OUT From: Fuad Tabba To: Marc Zyngier , Oliver Upton Cc: Joey Gouly , Steffen Eiden , Suzuki K Poulose , Zenghui Yu , Zenghui Yu , Ganapatrao Kulkarni , Will Deacon , Fuad Tabba , kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Subject: [PATCH v2 2/3] KVM: arm64: nv: Read a guest hypervisor's CNTV_CVAL_EL0 from memory on x1e Date: Wed, 7 Oct 2026 08:43:42 +0100 Message-Id: <20261007074343.324269-3-fuad.tabba@linux.dev> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20261007074343.324269-1-fuad.tabba@linux.dev> References: <20261007074343.324269-1-fuad.tabba@linux.dev> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit On x1e KVM keeps CNTVOFF_EL2 at zero, traps the virtual timer whenever it has an offset and programs the hardware with the offset applied. kvm_hyp_handle_timer() returns that hardware value for a VHE guest hypervisor's read of its own CNTV_CVAL_EL0, instead of the CVAL it wrote. Its writes trap to the kernel and land in CNTHV_CVAL_EL2, so return that, as the physical timer's read does without CNTPOFF_EL2. Fixes: 0bc9a9e85fcf ("KVM: arm64: Work around x1e's CNTVOFF_EL2 bogosity") Signed-off-by: Fuad Tabba --- arch/arm64/kvm/hyp/vhe/switch.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/arch/arm64/kvm/hyp/vhe/switch.c b/arch/arm64/kvm/hyp/vhe/switch.c index 14aada311bac4..4c965f9b1e1de 100644 --- a/arch/arm64/kvm/hyp/vhe/switch.c +++ b/arch/arm64/kvm/hyp/vhe/switch.c @@ -322,10 +322,14 @@ static bool kvm_hyp_handle_timer(struct kvm_vcpu *vcpu, u64 *exit_code) val = __vcpu_sys_reg(vcpu, CNTV_CVAL_EL0); break; case SYS_CNTV_CVAL_EL0: - if (vcpu_el2_e2h_is_set(vcpu)) - val = read_sysreg_el0(SYS_CNTV_CVAL); - else + if (vcpu_el2_e2h_is_set(vcpu)) { + if (has_broken_cntvoff() && timer_get_offset(vcpu_hvtimer(vcpu))) + val = __vcpu_sys_reg(vcpu, CNTHV_CVAL_EL2); + else + val = read_sysreg_el0(SYS_CNTV_CVAL); + } else { val = __vcpu_sys_reg(vcpu, CNTV_CVAL_EL0); + } break; case SYS_CNTVCT_EL0: case SYS_CNTVCTSS_EL0: -- 2.39.5