From: "Heiko Stübner" <heiko@sntech.de>
To: linux-riscv@lists.infradead.org, palmer@dabbelt.com,
anup@brainfault.org, atishp@atishpatra.org,
kvm-riscv@lists.infradead.org, kvm@vger.kernel.org,
Andy Chiu <andy.chiu@sifive.com>
Cc: vineetg@rivosinc.com, greentime.hu@sifive.com,
guoren@linux.alibaba.com, Andy Chiu <andy.chiu@sifive.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Vincent Chen <vincent.chen@sifive.com>,
Guo Ren <guoren@kernel.org>,
Kefeng Wang <wangkefeng.wang@huawei.com>,
Sunil V L <sunilvl@ventanamicro.com>,
Conor Dooley <conor.dooley@microchip.com>,
Jisheng Zhang <jszhang@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Andrew Morton <akpm@linux-foundation.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Josh Triplett <josh@joshtriplett.org>,
Stefan Roesch <shr@devkernel.io>, Joey Gouly <joey.gouly@arm.com>,
Jordy Zomer <jordyzomer@google.com>,
"Eric W. Biederman" <ebiederm@xmission.com>,
Ondrej Mosnacek <omosnace@redhat.com>,
David Hildenbrand <david@redhat.com>,
"Jason A. Donenfeld" <Jason@zx2c4.com>
Subject: Re: [PATCH -next v19 20/24] riscv: Add prctl controls for userspace vector management
Date: Tue, 09 May 2023 13:14:26 +0200 [thread overview]
Message-ID: <2629220.BddDVKsqQX@diego> (raw)
In-Reply-To: <20230509103033.11285-21-andy.chiu@sifive.com>
Hi,
need to poke this more, but one issue popped up at first compile.
Am Dienstag, 9. Mai 2023, 12:30:29 CEST schrieb Andy Chiu:
> This patch add two riscv-specific prctls, to allow usespace control the
> use of vector unit:
>
> * PR_RISCV_V_SET_CONTROL: control the permission to use Vector at next,
> or all following execve for a thread. Turning off a thread's Vector
> live is not possible since libraries may have registered ifunc that
> may execute Vector instructions.
> * PR_RISCV_V_GET_CONTROL: get the same permission setting for the
> current thread, and the setting for following execve(s).
>
> Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
> Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
> Reviewed-by: Vincent Chen <vincent.chen@sifive.com>
> diff --git a/arch/riscv/kernel/vector.c b/arch/riscv/kernel/vector.c
> index 960a343799c6..16ccb35625a9 100644
> --- a/arch/riscv/kernel/vector.c
> +++ b/arch/riscv/kernel/vector.c
> @@ -9,6 +9,7 @@
> #include <linux/slab.h>
> #include <linux/sched.h>
> #include <linux/uaccess.h>
> +#include <linux/prctl.h>
>
> #include <asm/thread_info.h>
> #include <asm/processor.h>
> @@ -19,6 +20,8 @@
> #include <asm/ptrace.h>
> #include <asm/bug.h>
>
> +static bool riscv_v_implicit_uacc = !IS_ENABLED(CONFIG_RISCV_V_DISABLE);
> +
> unsigned long riscv_v_vsize __read_mostly;
> EXPORT_SYMBOL_GPL(riscv_v_vsize);
>
> @@ -91,11 +94,51 @@ static int riscv_v_thread_zalloc(void)
> return 0;
> }
>
> +#define VSTATE_CTRL_GET_CUR(x) ((x) & PR_RISCV_V_VSTATE_CTRL_CUR_MASK)
> +#define VSTATE_CTRL_GET_NEXT(x) (((x) & PR_RISCV_V_VSTATE_CTRL_NEXT_MASK) >> 2)
> +#define VSTATE_CTRL_MAKE_NEXT(x) (((x) << 2) & PR_RISCV_V_VSTATE_CTRL_NEXT_MASK)
> +#define VSTATE_CTRL_GET_INHERIT(x) (!!((x) & PR_RISCV_V_VSTATE_CTRL_INHERIT))
> +static inline int riscv_v_get_cur_ctrl(struct task_struct *tsk)
> +{
> + return VSTATE_CTRL_GET_CUR(tsk->thread.vstate_ctrl);
> +}
> +
> +static inline int riscv_v_get_next_ctrl(struct task_struct *tsk)
> +{
> + return VSTATE_CTRL_GET_NEXT(tsk->thread.vstate_ctrl);
> +}
> +
> +static inline bool riscv_v_test_ctrl_inherit(struct task_struct *tsk)
> +{
> + return VSTATE_CTRL_GET_INHERIT(tsk->thread.vstate_ctrl);
> +}
> +
> +static inline void riscv_v_set_ctrl(struct task_struct *tsk, int cur, int nxt,
> + bool inherit)
> +{
> + unsigned long ctrl;
> +
> + ctrl = cur & PR_RISCV_V_VSTATE_CTRL_CUR_MASK;
> + ctrl |= VSTATE_CTRL_MAKE_NEXT(nxt);
> + if (inherit)
> + ctrl |= PR_RISCV_V_VSTATE_CTRL_INHERIT;
> + tsk->thread.vstate_ctrl = ctrl;
> +}
> +
> +bool riscv_v_user_allowed(void)
> +{
> + return riscv_v_get_cur_ctrl(current) == PR_RISCV_V_VSTATE_CTRL_ON;
> +}
EXPORT_SYMBOL(riscv_v_user_allowed);
kvm is allowed to be built as module, so you could end up with:
ERROR: modpost: "riscv_v_user_allowed" [arch/riscv/kvm/kvm.ko] undefined!
make[2]: *** [../scripts/Makefile.modpost:136: Module.symvers] Fehler 1
make[1]: *** [/home/devel/hstuebner/00_git-repos/linux-riscv/Makefile:1978: modpost] Fehler 2
make[1]: Verzeichnis „/home/devel/hstuebner/00_git-repos/linux-riscv/_build-riscv64“ wird verlassen
make: *** [Makefile:226: __sub-make] Fehler 2
Heiko
next prev parent reply other threads:[~2023-05-09 11:14 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-09 10:30 [PATCH -next v19 00/24] riscv: Add vector ISA support Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 01/24] riscv: Rename __switch_to_aux() -> fpu Andy Chiu
2023-05-11 22:56 ` Palmer Dabbelt
2023-05-16 2:47 ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 02/24] riscv: Extending cpufeature.c to detect V-extension Andy Chiu
2023-05-11 22:56 ` Palmer Dabbelt
2023-05-09 10:30 ` [PATCH -next v19 03/24] riscv: hwprobe: Add support for RISCV_HWPROBE_BASE_BEHAVIOR_V Andy Chiu
2023-05-09 11:05 ` Heiko Stübner
2023-05-09 16:41 ` Andy Chiu
2023-05-09 17:32 ` Evan Green
2023-05-09 17:59 ` Palmer Dabbelt
2023-05-09 18:29 ` Evan Green
2023-05-11 22:36 ` Palmer Dabbelt
2023-05-09 10:30 ` [PATCH -next v19 04/24] riscv: Add new csr defines related to vector extension Andy Chiu
2023-05-11 22:56 ` Palmer Dabbelt
2023-05-16 3:15 ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 05/24] riscv: Clear vector regfile on bootup Andy Chiu
2023-05-11 22:56 ` Palmer Dabbelt
2023-05-09 10:30 ` [PATCH -next v19 06/24] riscv: Disable Vector Instructions for kernel itself Andy Chiu
2023-05-11 22:56 ` Palmer Dabbelt
2023-05-09 10:30 ` [PATCH -next v19 07/24] riscv: Introduce Vector enable/disable helpers Andy Chiu
2023-05-11 22:56 ` Palmer Dabbelt
2023-05-09 10:30 ` [PATCH -next v19 08/24] riscv: Introduce riscv_v_vsize to record size of Vector context Andy Chiu
2023-05-11 22:56 ` Palmer Dabbelt
2023-05-09 10:30 ` [PATCH -next v19 09/24] riscv: Introduce struct/helpers to save/restore per-task Vector state Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 10/24] riscv: Add task switch support for vector Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 11/24] riscv: Allocate user's vector context in the first-use trap Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 12/24] riscv: Add ptrace vector support Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 13/24] riscv: signal: check fp-reserved words unconditionally Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 14/24] riscv: signal: Add sigcontext save/restore for vector Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 15/24] riscv: signal: Report signal frame size to userspace via auxv Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 16/24] riscv: signal: validate altstack to reflect Vector Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 17/24] riscv: prevent stack corruption by reserving task_pt_regs(p) early Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 18/24] riscv: kvm: Add V extension to KVM ISA Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 19/24] riscv: KVM: Add vector lazy save/restore support Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 20/24] riscv: Add prctl controls for userspace vector management Andy Chiu
2023-05-09 11:14 ` Heiko Stübner [this message]
2023-05-09 16:11 ` Andy Chiu
2023-05-09 17:58 ` Palmer Dabbelt
2023-05-15 11:38 ` Björn Töpel
2023-05-16 7:13 ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 21/24] riscv: Add sysctl to set the default vector rule for new processes Andy Chiu
2023-05-15 11:42 ` Björn Töpel
2023-05-09 10:30 ` [PATCH -next v19 22/24] riscv: detect assembler support for .option arch Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 23/24] riscv: Enable Vector code to be built Andy Chiu
2023-05-09 12:34 ` Conor Dooley
2023-05-09 16:04 ` Andy Chiu
2023-05-09 16:53 ` Conor Dooley
2023-05-09 20:59 ` Palmer Dabbelt
2023-05-09 21:06 ` Conor Dooley
2023-05-15 12:04 ` Conor Dooley
2023-05-09 22:14 ` kernel test robot
2023-05-09 10:30 ` [PATCH -next v19 24/24] riscv: Add documentation for Vector Andy Chiu
2023-05-15 11:41 ` Björn Töpel
2023-05-09 20:59 ` [PATCH -next v19 00/24] riscv: Add vector ISA support Palmer Dabbelt
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