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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: mDpVdU62BfyTKhsPQmMiizbqLAUduS4ktmlnC4IMJAWkQvAR2hx1W9xgA7N1vMBEESfhqSGfySS5bEpyO4T6ZiRANQsvKwffrIj1lVRA+Pd3D6hgbz5MRARnr1eaTJO1+2YWUQp7Y+EkoIwx/bGq41AhY5HG0CN26wbmUwjWHRqTYq1kfrxru7N5Qz+N6Y7qzl486wVCwXHJOBSrnXnR2V8OEluMG0aFHxOsHPpfmP1O9Vio4TAaAzqXh7xf1N3yx5msa/OlFd3BOsKjkuvOOdBY73ikIoQPWtkwK4iL7vjmdiRyzspTkprc7GNkJ/aSZdTdil5Tzi495udzvLJ9EewM0oIQN1GU+a2+jxGWlQHYdadQXH1ogcCIDBnwb+oAu1aLzdB7Xg1C35JDKLTOOkK016iOFVMamBJPwU37SOUgXc7eIAWV61i3fPcs0fOX X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Jul 2026 07:27:53.2896 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 42f4a103-9f57-4e60-8609-08dedb30178e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B071.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4120 On 30-06-26 04:38, Yosry Ahmed wrote: > On Mon, Jun 29, 2026 at 08:10:18AM +0000, Shivansh Dhiman wrote: >> From: Ravi Bangoria >> >> Add Bus Lock Detect support in AMD SVM. Bus Lock Detect is enabled through >> MSR_IA32_DEBUGCTLMSR and MSR_IA32_DEBUGCTLMSR is virtualized only if LBR >> Virtualization is enabled. Add this dependency in the SVM. >> >> While adding Bus Lock Detect support, also fix DR6 handling in nested >> virtualization. Using DR6_FIXED_1 to prevent reset of BLD bit (bit 11) >> between VMRUNs. However, it preserves DR6_RTM, which is a reserved bit >> on AMD processors. So, DR6_RTM bit must always be set to 1. >> >> Signed-off-by: Ravi Bangoria >> Reviewed-by: Tom Lendacky >> Co-developed-by: Shivansh Dhiman >> Signed-off-by: Shivansh Dhiman >> --- >> Changelog: >> v2 --> v2 Resend >> * No functional changes. >> * Rebased on top of tag: kvm-x86-next-2026.06.24. >> >> v1 --> v2 >> * Rebased and used guest_cpu_cap_has() instead of guest_cpuid_has(). >> >> v2: https://lore.kernel.org/kvm/20251121081228.426974-1-shivansh.dhiman@amd.com/ >> v1: https://lore.kernel.org/all/20240808062937.1149-5-ravi.bangoria@amd.com >> --- >> arch/x86/kvm/svm/nested.c | 3 ++- >> arch/x86/kvm/svm/svm.c | 17 ++++++++++++++++- >> arch/x86/kvm/svm/svm.h | 2 +- >> 3 files changed, 19 insertions(+), 3 deletions(-) >> >> diff --git a/arch/x86/kvm/svm/nested.c b/arch/x86/kvm/svm/nested.c >> index c1485c3e691c..4fdc58d38afe 100644 >> --- a/arch/x86/kvm/svm/nested.c >> +++ b/arch/x86/kvm/svm/nested.c >> @@ -808,7 +808,8 @@ static void nested_vmcb02_prepare_save(struct vcpu_svm *svm) >> >> if (unlikely(new_vmcb12 || vmcb12_is_dirty(control, VMCB_DR))) { >> vmcb02->save.dr7 = svm->nested.save.dr7 | DR7_FIXED_1; >> - svm->vcpu.arch.dr6 = svm->nested.save.dr6 | DR6_ACTIVE_LOW; >> + /* DR6_RTM is a reserved bit on AMD and as such must be set to 1 */ >> + svm->vcpu.arch.dr6 = svm->nested.save.dr6 | DR6_FIXED_1 | DR6_RTM; >> vmcb_mark_dirty(vmcb02, VMCB_DR); >> } >> >> diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c >> index ef69a51ab27f..b4b0fa730916 100644 >> --- a/arch/x86/kvm/svm/svm.c >> +++ b/arch/x86/kvm/svm/svm.c >> @@ -884,6 +884,9 @@ void svm_update_lbrv(struct kvm_vcpu *vcpu) >> (is_guest_mode(vcpu) && guest_cpu_cap_has(vcpu, X86_FEATURE_LBRV) && >> (svm->nested.ctl.misc_ctl2 & SVM_MISC2_ENABLE_V_LBR)); >> >> + /* Bus Lock Detect depends on LBR Virtualization */ >> + enable_lbrv |= (svm->vmcb->save.dbgctl & DEBUGCTLMSR_BUS_LOCK_DETECT); >> + > > A few lines above we have: > > bool enable_lbrv = (svm->vmcb->save.dbgctl & DEBUGCTLMSR_LBR) || > (is_guest_mode(vcpu) && guest_cpu_cap_has(vcpu, X86_FEATURE_LBRV) && > (svm->nested.ctl.misc_ctl2 & SVM_MISC2_ENABLE_V_LBR)); > > We probably want to combine "svm->vmcb->save.dbgctl & DEBUGCTLMSR_LBR" > with the new added check, and use nested_vmcb12_has_lbrv(). Maybe > end up with something like this (you'll probably want to refactor in a > separate patch): > > bool enable_lbrv = false; > > if (svm->vmcb->save.dbgctl & (DEBUGCTLMSR_LBR | DEBUGCTLMSR_BUS_LOCK_DETECT)) > enable_lbrv = true; > > if (is_guest_mode(vcpu) && nested_vmcb12_has_lbrv(vcpu)) > enable_lbrv = true; > > Agreed. I'll split this into a separate refactoring patch before the Bus Lock Detect change in v3. > --- > > Completely unrelated to this patch, but we should probably just clear > SVM_MISC2_ENABLE_V_LBR in __nested_copy_vmcb_control_to_cache() if the > guest vCPU doesn't have X86_FEATURE_LBRV instead of checking > X86_FEATURE_LBRV every time, similar to SVM_MISC_ENABLE_NP > and SVM_MISC_ENABLE_GMET. Makes sense, I'll add that as a separate patch too. Thanks for the review! > >> if (enable_lbrv && !current_enable_lbrv) >> __svm_enable_lbrv(vcpu); >> else if (!enable_lbrv && current_enable_lbrv) >> @@ -3160,6 +3163,10 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr) >> data &= ~DEBUGCTLMSR_BTF; >> } >> >> + if ((data & DEBUGCTLMSR_BUS_LOCK_DETECT) && >> + !guest_cpu_cap_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT)) >> + return 1; >> + >> if (data & DEBUGCTL_RESERVED_BITS) >> return 1; >> >> @@ -5591,9 +5598,17 @@ static __init void svm_set_cpu_caps(void) >> * Clear capabilities that are automatically configured by common code, >> * but that require explicit SVM support (that isn't yet implemented). >> */ >> - kvm_cpu_cap_clear(X86_FEATURE_BUS_LOCK_DETECT); >> kvm_cpu_cap_clear(X86_FEATURE_MSR_IMM); >> >> + /* >> + * LBR Virtualization must be enabled to support BusLockTrap inside the >> + * guest, since BusLockTrap is enabled through MSR_IA32_DEBUGCTLMSR and >> + * MSR_IA32_DEBUGCTLMSR is virtualized only if LBR Virtualization is >> + * enabled. >> + */ >> + if (!lbrv) >> + kvm_cpu_cap_clear(X86_FEATURE_BUS_LOCK_DETECT); >> + >> kvm_setup_xss_caps(); >> kvm_finalize_cpu_caps(); >> } >> diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h >> index 716be21fba33..c65dc3acb5d1 100644 >> --- a/arch/x86/kvm/svm/svm.h >> +++ b/arch/x86/kvm/svm/svm.h >> @@ -783,7 +783,7 @@ BUILD_SVM_MSR_BITMAP_HELPERS(bool, test, test) >> BUILD_SVM_MSR_BITMAP_HELPERS(void, clear, __clear) >> BUILD_SVM_MSR_BITMAP_HELPERS(void, set, __set) >> >> -#define DEBUGCTL_RESERVED_BITS (~DEBUGCTLMSR_LBR) >> +#define DEBUGCTL_RESERVED_BITS (~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BUS_LOCK_DETECT)) >> >> /* svm.c */ >> extern bool dump_invalid_vmcb; >> >> base-commit: 50406d35f5635e1cc523e61409d57e851b5f5df8 >> -- >> 2.43.0 >> >>