From: Like Xu <like.xu.linux@gmail.com>
To: Jim Mattson <jmattson@google.com>, Paolo Bonzini <pbonzini@redhat.com>
Cc: kvm@vger.kernel.org, Sean Christopherson <seanjc@google.com>,
Wanpeng Li <wanpengli@tencent.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Joerg Roedel <joro@8bytes.org>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 12/12] KVM: x86/pmu: Clear reserved bit PERF_CTL2[43] for AMD erratum 1292
Date: Fri, 4 Mar 2022 17:46:58 +0800 [thread overview]
Message-ID: <273a7631-188b-a7a9-a551-4e577dcdd8d1@gmail.com> (raw)
In-Reply-To: <CALMp9eT1N_HeipXjpyqrXs_WmBEip2vchy4d1GffpwrEd+444w@mail.gmail.com>
On 3/3/2022 1:52 am, Jim Mattson wrote:
> On Wed, Mar 2, 2022 at 3:14 AM Like Xu <like.xu.linux@gmail.com> wrote:
>>
>> From: Like Xu <likexu@tencent.com>
>>
>> The AMD Family 19h Models 00h-0Fh Processors may experience sampling
>> inaccuracies that cause the following performance counters to overcount
>> retire-based events. To count the non-FP affected PMC events correctly,
>> a patched guest with a target vCPU model would:
>>
>> - Use Core::X86::Msr::PERF_CTL2 to count the events, and
>> - Program Core::X86::Msr::PERF_CTL2[43] to 1b, and
>> - Program Core::X86::Msr::PERF_CTL2[20] to 0b.
>>
>> To support this use of AMD guests, KVM should not reserve bit 43
>> only for counter #2. Treatment of other cases remains unchanged.
>>
>> AMD hardware team clarified that the conditions under which the
>> overcounting can happen, is quite rare. This change may make those
>> PMU driver developers who have read errata #1292 less disappointed.
>>
>> Reported-by: Jim Mattson <jmattson@google.com>
>> Signed-off-by: Like Xu <likexu@tencent.com>
>
> This seems unnecessarily convoluted. As I've said previously, KVM
> should not ever synthesize a #GP for any value written to a
> PerfEvtSeln MSR when emulating an AMD CPU.
IMO, we should "never synthesize a #GP" for all AMD MSRs,
not just for AMD PMU msrs, or keep the status quo.
I agree with you on this AMD #GP transition, but we need at least one
kernel cycle to make a more radical change and we don't know Paolo's
attitude and more, we haven't received a tidal wave of user complaints.
next prev parent reply other threads:[~2022-03-04 9:48 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-02 11:13 [PATCH v2 00/12] KVM: x86/pmu: Get rid of PERF_TYPE_HARDWAR and other minor fixes Like Xu
2022-03-02 11:13 ` [PATCH v2 01/12] KVM: x86/pmu: Update comments for AMD gp counters Like Xu
2022-03-02 11:13 ` [PATCH v2 02/12] KVM: x86/pmu: Extract check_pmu_event_filter() from the same semantics Like Xu
2022-03-02 11:13 ` [PATCH v2 03/12] KVM: x86/pmu: Pass only "struct kvm_pmc *pmc" to reprogram_counter() Like Xu
2022-03-02 11:13 ` [PATCH v2 04/12] KVM: x86/pmu: Drop "u64 eventsel" for reprogram_gp_counter() Like Xu
2022-03-02 11:13 ` [PATCH v2 05/12] KVM: x86/pmu: Drop "u8 ctrl, int idx" for reprogram_fixed_counter() Like Xu
2022-03-02 11:13 ` [PATCH v2 06/12] KVM: x86/pmu: Use only the uniformly exported interface reprogram_counter() Like Xu
2022-03-02 11:13 ` [PATCH v2 07/12] KVM: x86/pmu: Use PERF_TYPE_RAW to merge reprogram_{gp, fixed}counter() Like Xu
2022-03-08 0:36 ` Jim Mattson
2022-03-08 11:43 ` Like Xu
2022-03-02 11:13 ` [PATCH v2 08/12] perf: x86/core: Add interface to query perfmon_event_map[] directly Like Xu
2022-03-02 11:13 ` [PATCH v2 09/12] KVM: x86/pmu: Replace pmc_perf_hw_id() with perf_get_hw_event_config() Like Xu
2022-03-02 11:13 ` [PATCH v2 10/12] KVM: x86/pmu: Drop amd_event_mapping[] in the KVM context Like Xu
2022-03-02 11:13 ` [PATCH v2 11/12] KVM: x86/pmu: Protect kvm->arch.pmu_event_filter with SRCU Like Xu
2022-03-02 11:13 ` [PATCH v2 12/12] KVM: x86/pmu: Clear reserved bit PERF_CTL2[43] for AMD erratum 1292 Like Xu
2022-03-02 17:52 ` Jim Mattson
2022-03-04 9:46 ` Like Xu [this message]
2022-03-04 19:06 ` Jim Mattson
2022-03-08 11:25 ` Like Xu
2022-03-08 16:14 ` Jim Mattson
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