From: "Nutty Liu" <liujingqi@lanxincomputing.com>
To: <zhouquan@iscas.ac.cn>, <anup@brainfault.org>,
<ajones@ventanamicro.com>, <atishp@atishpatra.org>,
<paul.walmsley@sifive.com>, <palmer@dabbelt.com>
Cc: <linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
<kvm@vger.kernel.org>, <kvm-riscv@lists.infradead.org>
Subject: Re: [PATCH 5/5] KVM: riscv: selftests: Add bfloat16 extension to get-reg-list test
Date: Fri, 20 Jun 2025 17:58:38 +0800 [thread overview]
Message-ID: <2acb706f-fb20-45ef-a8c8-762e193ca548@lanxincomputing.com> (raw)
In-Reply-To: <65752029ed1ae331a9ac867a6fef2e63a797569e.1750164414.git.zhouquan@iscas.ac.cn>
On 6/17/2025 9:10 PM, zhouquan@iscas.ac.cn wrote:
> From: Quan Zhou <zhouquan@iscas.ac.cn>
>
> The KVM RISC-V allows Zfbfmin/Zvfbfmin/Zvfbfwma extensions for Guest/VM
> so add them to get-reg-list test.
>
> Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
> ---
> tools/testing/selftests/kvm/riscv/get-reg-list.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c
> index ebdc34b58bad..e5a07e000b66 100644
> --- a/tools/testing/selftests/kvm/riscv/get-reg-list.c
> +++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c
> @@ -80,6 +80,7 @@ bool filter_reg(__u64 reg)
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZCF:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZCMOP:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFA:
> + case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFBFMIN:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFH:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFHMIN:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICBOM:
> @@ -104,6 +105,8 @@ bool filter_reg(__u64 reg)
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZTSO:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVBB:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVBC:
> + case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVFBFMIN:
> + case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVFBFWMA:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVFH:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVFHMIN:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVKB:
> @@ -535,6 +538,7 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off)
> KVM_ISA_EXT_ARR(ZCF),
> KVM_ISA_EXT_ARR(ZCMOP),
> KVM_ISA_EXT_ARR(ZFA),
> + KVM_ISA_EXT_ARR(ZFBFMIN),
> KVM_ISA_EXT_ARR(ZFH),
> KVM_ISA_EXT_ARR(ZFHMIN),
> KVM_ISA_EXT_ARR(ZICBOM),
> @@ -559,6 +563,8 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off)
> KVM_ISA_EXT_ARR(ZTSO),
> KVM_ISA_EXT_ARR(ZVBB),
> KVM_ISA_EXT_ARR(ZVBC),
> + KVM_ISA_EXT_ARR(ZVFBFMIN),
> + KVM_ISA_EXT_ARR(ZVFBFWMA),
> KVM_ISA_EXT_ARR(ZVFH),
> KVM_ISA_EXT_ARR(ZVFHMIN),
> KVM_ISA_EXT_ARR(ZVKB),
> @@ -1138,6 +1144,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(zcd, ZCD);
> KVM_ISA_EXT_SIMPLE_CONFIG(zcf, ZCF);
> KVM_ISA_EXT_SIMPLE_CONFIG(zcmop, ZCMOP);
> KVM_ISA_EXT_SIMPLE_CONFIG(zfa, ZFA);
> +KVM_ISA_EXT_SIMPLE_CONFIG(zfbfmin, ZFBFMIN);
> KVM_ISA_EXT_SIMPLE_CONFIG(zfh, ZFH);
> KVM_ISA_EXT_SIMPLE_CONFIG(zfhmin, ZFHMIN);
> KVM_ISA_EXT_SUBLIST_CONFIG(zicbom, ZICBOM);
> @@ -1162,6 +1169,8 @@ KVM_ISA_EXT_SIMPLE_CONFIG(zkt, ZKT);
> KVM_ISA_EXT_SIMPLE_CONFIG(ztso, ZTSO);
> KVM_ISA_EXT_SIMPLE_CONFIG(zvbb, ZVBB);
> KVM_ISA_EXT_SIMPLE_CONFIG(zvbc, ZVBC);
> +KVM_ISA_EXT_SIMPLE_CONFIG(zvfbfmin, ZVFBFMIN);
> +KVM_ISA_EXT_SIMPLE_CONFIG(zvfbfwma, ZVFBFWMA);
> KVM_ISA_EXT_SIMPLE_CONFIG(zvfh, ZVFH);
> KVM_ISA_EXT_SIMPLE_CONFIG(zvfhmin, ZVFHMIN);
> KVM_ISA_EXT_SIMPLE_CONFIG(zvkb, ZVKB);
> @@ -1213,6 +1222,7 @@ struct vcpu_reg_list *vcpu_configs[] = {
> &config_zcf,
> &config_zcmop,
> &config_zfa,
> + &config_zfbfmin,
> &config_zfh,
> &config_zfhmin,
> &config_zicbom,
> @@ -1237,6 +1247,8 @@ struct vcpu_reg_list *vcpu_configs[] = {
> &config_ztso,
> &config_zvbb,
> &config_zvbc,
> + &config_zvfbfmin,
> + &config_zvfbfwma,
> &config_zvfh,
> &config_zvfhmin,
> &config_zvkb,
Reviewed-by: Nutty Liu<liujingqi@lanxincomputing.com>
Thanks,
Nutty
next prev parent reply other threads:[~2025-06-20 9:58 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-17 13:10 [PATCH 0/5] RISC-V: KVM: Allow zicop/bfloat16 exts for guest zhouquan
2025-06-17 13:10 ` [PATCH 1/5] RISC-V: KVM: Provide UAPI for Zicbop block size zhouquan
2025-06-20 9:36 ` Nutty Liu
2025-06-24 13:45 ` Andrew Jones
2025-06-17 13:10 ` [PATCH 2/5] RISC-V: KVM: Allow Zicbop extension for Guest/VM zhouquan
2025-06-20 9:40 ` Nutty Liu
2025-06-24 13:46 ` Andrew Jones
2025-06-17 13:10 ` [PATCH 3/5] RISC-V: KVM: Allow bfloat16 " zhouquan
2025-06-20 9:49 ` Nutty Liu
2025-06-24 13:46 ` Andrew Jones
2025-06-17 13:10 ` [PATCH 4/5] KVM: riscv: selftests: Add Zicbop extension to get-reg-list test zhouquan
2025-06-20 9:58 ` Nutty Liu
2025-06-24 13:47 ` Andrew Jones
2025-06-17 13:10 ` [PATCH 5/5] KVM: riscv: selftests: Add bfloat16 " zhouquan
2025-06-20 9:58 ` Nutty Liu [this message]
2025-06-24 13:47 ` Andrew Jones
2025-07-17 12:04 ` [PATCH 0/5] RISC-V: KVM: Allow zicop/bfloat16 exts for guest Anup Patel
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