From: Julien Grall <julien.grall@arm.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>,
linux-arm-kernel@lists.infradead.org
Cc: ard.biesheuvel@linaro.org, kvm@vger.kernel.org,
marc.zyngier@arm.com, catalin.marinas@arm.com,
punit.agrawal@arm.com, will.deacon@arm.com,
linux-kernel@vger.kernel.org, kristina.martsenko@arm.com,
pbonzini@redhat.com, kvmarm@lists.cs.columbia.edu
Subject: Re: [PATCH v2 03/17] arm64: Make page table helpers reusable
Date: Thu, 26 Apr 2018 11:54:55 +0100 [thread overview]
Message-ID: <2afc71dd-0e97-7a86-b70f-a941ff4b4f26@arm.com> (raw)
In-Reply-To: <1522156531-28348-4-git-send-email-suzuki.poulose@arm.com>
Hi Suzuki,
On 27/03/18 14:15, Suzuki K Poulose wrote:
> This patch rearranges the page table level helpers so that it can
> be reused for a page table with different number of levels
> (e.g, stage2 page table for a VM) than the kernel page tables.
> As such there is no functional change with this patch.
>
> The page table helpers are defined to do the right thing for the
> fixed page table levels set for the kernel. This patch tries to
> refactor the code such that, we can have helpers for each level,
> which should be used when the caller knows that the level exists
> for the page table dealt with. Since the kernel defines helpers
> p.d_action and __p.d_action, for consistency, we name the raw
> page table action helpers __raw_p.d_action.
>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: Will Deacon <will.deacon@arm.com>
> Cc: Steve Capper <steve.capper@arm.com>
> Cc: Marc Zyngier <marc.zyngier@arm.com>
> Cc: Christoffer Dall <cdall@kernel.org>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Julien Grall <julien.grall@arm.com>
Cheers,
> ---
> arch/arm64/include/asm/pgalloc.h | 34 +++++++++++++++++++----
> arch/arm64/include/asm/pgtable.h | 60 +++++++++++++++++++++++++---------------
> 2 files changed, 66 insertions(+), 28 deletions(-)
>
> diff --git a/arch/arm64/include/asm/pgalloc.h b/arch/arm64/include/asm/pgalloc.h
> index 2e05bcd..ab4662c 100644
> --- a/arch/arm64/include/asm/pgalloc.h
> +++ b/arch/arm64/include/asm/pgalloc.h
> @@ -29,6 +29,30 @@
> #define PGALLOC_GFP (GFP_KERNEL | __GFP_ZERO)
> #define PGD_SIZE (PTRS_PER_PGD * sizeof(pgd_t))
>
> +static inline void __raw_pmd_free(pmd_t *pmdp)
> +{
> + BUG_ON((unsigned long)pmdp & (PAGE_SIZE-1));
> + free_page((unsigned long)pmdp);
> +}
> +
> +static inline void
> +__raw_pud_populate(pud_t *pudp, phys_addr_t pmdp, pudval_t prot)
> +{
> + __raw_set_pud(pudp, __pud(__phys_to_pud_val(pmdp) | prot));
> +}
> +
> +static inline void __raw_pud_free(pud_t *pudp)
> +{
> + BUG_ON((unsigned long)pudp & (PAGE_SIZE-1));
> + free_page((unsigned long)pudp);
> +}
> +
> +static inline void
> +__raw_pgd_populate(pgd_t *pgdp, phys_addr_t pudp, pgdval_t prot)
> +{
> + __raw_set_pgd(pgdp, __pgd(__phys_to_pgd_val(pudp) | prot));
> +}
> +
> #if CONFIG_PGTABLE_LEVELS > 2
>
> static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
> @@ -38,13 +62,12 @@ static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
>
> static inline void pmd_free(struct mm_struct *mm, pmd_t *pmdp)
> {
> - BUG_ON((unsigned long)pmdp & (PAGE_SIZE-1));
> - free_page((unsigned long)pmdp);
> + __raw_pmd_free(pmdp);
> }
>
> static inline void __pud_populate(pud_t *pudp, phys_addr_t pmdp, pudval_t prot)
> {
> - set_pud(pudp, __pud(__phys_to_pud_val(pmdp) | prot));
> + __raw_pud_populate(pudp, pmdp, prot);
> }
>
> static inline void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmdp)
> @@ -67,13 +90,12 @@ static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr)
>
> static inline void pud_free(struct mm_struct *mm, pud_t *pudp)
> {
> - BUG_ON((unsigned long)pudp & (PAGE_SIZE-1));
> - free_page((unsigned long)pudp);
> + __raw_pud_free(pudp);
> }
>
> static inline void __pgd_populate(pgd_t *pgdp, phys_addr_t pudp, pgdval_t prot)
> {
> - set_pgd(pgdp, __pgd(__phys_to_pgd_val(pudp) | prot));
> + __raw_pgd_populate(pgdp, pudp, prot);
> }
>
> static inline void pgd_populate(struct mm_struct *mm, pgd_t *pgdp, pud_t *pudp)
> diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
> index 7e2c27e..5e22503 100644
> --- a/arch/arm64/include/asm/pgtable.h
> +++ b/arch/arm64/include/asm/pgtable.h
> @@ -475,31 +475,39 @@ static inline phys_addr_t pmd_page_paddr(pmd_t pmd)
> */
> #define mk_pte(page,prot) pfn_pte(page_to_pfn(page),prot)
>
> -#if CONFIG_PGTABLE_LEVELS > 2
> +#define __raw_pud_none(pud) (!pud_val(pud))
> +#define __raw_pud_bad(pud) (!(pud_val(pud) & PUD_TABLE_BIT))
> +#define __raw_pud_present(pud) pte_present(pud_pte(pud))
>
> -#define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd_val(pmd))
> -
> -#define pud_none(pud) (!pud_val(pud))
> -#define pud_bad(pud) (!(pud_val(pud) & PUD_TABLE_BIT))
> -#define pud_present(pud) pte_present(pud_pte(pud))
> -
> -static inline void set_pud(pud_t *pudp, pud_t pud)
> +static inline void __raw_set_pud(pud_t *pudp, pud_t pud)
> {
> WRITE_ONCE(*pudp, pud);
> dsb(ishst);
> isb();
> }
>
> -static inline void pud_clear(pud_t *pudp)
> +static inline void __raw_pud_clear(pud_t *pudp)
> {
> - set_pud(pudp, __pud(0));
> + __raw_set_pud(pudp, __pud(0));
> }
>
> -static inline phys_addr_t pud_page_paddr(pud_t pud)
> +static inline phys_addr_t __raw_pud_page_paddr(pud_t pud)
> {
> return __pud_to_phys(pud);
> }
>
> +#if CONFIG_PGTABLE_LEVELS > 2
> +
> +#define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd_val(pmd))
> +
> +#define pud_none(pud) __raw_pud_none(pud)
> +#define pud_bad(pud) __raw_pud_bad(pud)
> +#define pud_present(pud) __raw_pud_present(pud)
> +
> +#define set_pud(pudp, pud) __raw_set_pud((pudp), (pud))
> +#define pud_clear(pudp) __raw_pud_clear((pudp))
> +#define pud_page_paddr(pud) __raw_pud_page_paddr((pud))
> +
> /* Find an entry in the second-level page table. */
> #define pmd_index(addr) (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
>
> @@ -528,30 +536,38 @@ static inline phys_addr_t pud_page_paddr(pud_t pud)
>
> #endif /* CONFIG_PGTABLE_LEVELS > 2 */
>
> -#if CONFIG_PGTABLE_LEVELS > 3
> +#define __raw_pgd_none(pgd) (!pgd_val(pgd))
> +#define __raw_pgd_bad(pgd) (!(pgd_val(pgd) & 2))
> +#define __raw_pgd_present(pgd) (pgd_val(pgd))
>
> -#define pud_ERROR(pud) __pud_error(__FILE__, __LINE__, pud_val(pud))
> -
> -#define pgd_none(pgd) (!pgd_val(pgd))
> -#define pgd_bad(pgd) (!(pgd_val(pgd) & 2))
> -#define pgd_present(pgd) (pgd_val(pgd))
> -
> -static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
> +static inline void __raw_set_pgd(pgd_t *pgdp, pgd_t pgd)
> {
> WRITE_ONCE(*pgdp, pgd);
> dsb(ishst);
> }
>
> -static inline void pgd_clear(pgd_t *pgdp)
> +static inline void __raw_pgd_clear(pgd_t *pgdp)
> {
> - set_pgd(pgdp, __pgd(0));
> + __raw_set_pgd(pgdp, __pgd(0));
> }
>
> -static inline phys_addr_t pgd_page_paddr(pgd_t pgd)
> +static inline phys_addr_t __raw_pgd_page_paddr(pgd_t pgd)
> {
> return __pgd_to_phys(pgd);
> }
>
> +#if CONFIG_PGTABLE_LEVELS > 3
> +
> +#define pud_ERROR(pud) __pud_error(__FILE__, __LINE__, pud_val(pud))
> +
> +#define pgd_none(pgd) __raw_pgd_none((pgd))
> +#define pgd_bad(pgd) __raw_pgd_bad((pgd))
> +#define pgd_present(pgd) __raw_pgd_present((pgd))
> +
> +#define set_pgd(pgdp, pgd) __raw_set_pgd((pgdp), (pgd))
> +#define pgd_clear(pgdp) __raw_pgd_clear((pgdp))
> +#define pgd_page_paddr(pgd) __raw_pgd_page_paddr((pgd))
> +
> /* Find an entry in the frst-level page table. */
> #define pud_index(addr) (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))
>
>
--
Julien Grall
next prev parent reply other threads:[~2018-04-26 10:54 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-27 13:15 [PATCH v2 00/17] kvm: arm64: Dynamic & 52bit IPA support Suzuki K Poulose
2018-03-27 13:15 ` [PATCH v2 01/17] virtio: mmio-v1: Validate queue PFN Suzuki K Poulose
2018-03-27 14:07 ` Michael S. Tsirkin
2018-03-27 13:15 ` [PATCH v2 02/17] virtio: pci-legacy: Validate queue pfn Suzuki K Poulose
2018-03-27 14:11 ` Michael S. Tsirkin
2018-07-13 0:36 ` Michael S. Tsirkin
2018-07-13 8:54 ` Suzuki K Poulose
2018-03-27 13:15 ` [PATCH v2 03/17] arm64: Make page table helpers reusable Suzuki K Poulose
2018-04-26 10:54 ` Julien Grall [this message]
2018-03-27 13:15 ` [PATCH v2 04/17] arm64: Refactor pud_huge for reusability Suzuki K Poulose
2018-04-26 10:55 ` Julien Grall
2018-03-27 13:15 ` [PATCH v2 05/17] arm64: Helper for parange to PASize Suzuki K Poulose
2018-04-26 10:58 ` Julien Grall
2018-04-27 15:18 ` Suzuki K Poulose
2018-04-27 15:18 ` Julien Grall
2018-05-03 14:39 ` James Morse
2018-05-08 13:47 ` Suzuki K Poulose
2018-03-27 13:15 ` [PATCH v2 06/17] kvm: arm/arm64: Fix stage2_flush_memslot for 4 level page table Suzuki K Poulose
2018-03-27 13:15 ` [PATCH v2 07/17] kvm: arm/arm64: Remove spurious WARN_ON Suzuki K Poulose
2018-03-27 13:15 ` [PATCH v2 08/17] kvm: arm/arm64: Prepare for VM specific stage2 translations Suzuki K Poulose
2018-04-26 13:35 ` Julien Grall
2018-04-27 15:22 ` Suzuki K Poulose
2018-04-27 15:58 ` Suzuki K Poulose
2018-04-27 16:04 ` Julien Grall
2018-03-27 13:15 ` [PATCH v2 09/17] kvm: arm64: Make stage2 page table layout dynamic Suzuki K Poulose
2018-04-25 16:35 ` Julien Grall
2018-04-25 16:37 ` Suzuki K Poulose
2018-03-27 13:15 ` [PATCH v2 10/17] kvm: arm64: Dynamic configuration of VTCR and VTTBR mask Suzuki K Poulose
2018-04-30 11:14 ` Julien Grall
2018-03-27 13:15 ` [PATCH v2 11/17] kvm: arm64: Configure VTCR per VM Suzuki K Poulose
2018-04-03 14:58 ` James Morse
2018-04-03 15:44 ` Suzuki K Poulose
2018-05-03 14:39 ` James Morse
2018-05-08 11:16 ` Suzuki K Poulose
2018-03-27 13:15 ` [PATCH v2 12/17] kvm: arm/arm64: Expose supported physical address limit for VM Suzuki K Poulose
2018-04-13 13:21 ` Peter Maydell
2018-04-16 10:23 ` Suzuki K Poulose
2018-03-27 13:15 ` [PATCH v2 13/17] kvm: arm/arm64: Allow tuning the physical address size " Suzuki K Poulose
2018-04-25 16:10 ` Julien Grall
2018-04-25 16:22 ` Suzuki K Poulose
2018-03-27 13:15 ` [PATCH v2 14/17] kvm: arm64: Switch to per VM IPA limit Suzuki K Poulose
2018-04-13 16:27 ` Punit Agrawal
2018-04-16 10:25 ` Suzuki K Poulose
2018-03-27 13:15 ` [PATCH v2 15/17] vgic: Add support for 52bit guest physical address Suzuki K Poulose
2018-03-27 13:15 ` [PATCH v2 16/17] kvm: arm64: Add support for handling 52bit IPA Suzuki K Poulose
2018-03-27 13:15 ` [PATCH v2 17/17] kvm: arm64: Allow IPA size supported by the system Suzuki K Poulose
2018-03-27 13:15 ` [kvmtool PATCH 18/17] kvmtool: Allow backends to run checks on the KVM device fd Suzuki K Poulose
2018-03-27 13:15 ` [kvmtool PATCH 19/17] kvmtool: arm64: Add support for guest physical address size Suzuki K Poulose
2018-03-27 13:15 ` [kvmtool PATCH 20/17] kvmtool: arm64: Switch memory layout Suzuki K Poulose
2018-04-03 12:34 ` Jean-Philippe Brucker
2018-03-27 13:15 ` [kvmtool PATCH 21/17] kvmtool: arm: Add support for creating VM with PA size Suzuki K Poulose
2018-04-26 14:08 ` Julien Grall
2018-04-30 14:17 ` Julien Grall
2018-04-30 14:18 ` Suzuki K Poulose
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=2afc71dd-0e97-7a86-b70f-a941ff4b4f26@arm.com \
--to=julien.grall@arm.com \
--cc=ard.biesheuvel@linaro.org \
--cc=catalin.marinas@arm.com \
--cc=kristina.martsenko@arm.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=marc.zyngier@arm.com \
--cc=pbonzini@redhat.com \
--cc=punit.agrawal@arm.com \
--cc=suzuki.poulose@arm.com \
--cc=will.deacon@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox