From: Pierre Morel <pmorel@linux.ibm.com>
To: Claudio Imbrenda <imbrenda@linux.ibm.com>
Cc: kvm@vger.kernel.org, frankja@linux.ibm.com, david@redhat.com,
thuth@redhat.com, cohuck@redhat.com
Subject: Re: [kvm-unit-tests PATCH v2 6/8] s390x: css: testing ssch error response
Date: Thu, 25 Mar 2021 18:23:03 +0100 [thread overview]
Message-ID: <2e1c410d-3c97-e169-903f-a3a5ac7cdcec@linux.ibm.com> (raw)
In-Reply-To: <20210325170257.2e753967@ibm-vm>
On 3/25/21 5:02 PM, Claudio Imbrenda wrote:
> On Thu, 25 Mar 2021 10:39:05 +0100
> Pierre Morel <pmorel@linux.ibm.com> wrote:
>
>> Checking error response on various eroneous SSCH instructions:
>> - ORB alignment
>> - ORB above 2G
>> - CCW above 2G
>> - bad ORB flags
>>
>> Signed-off-by: Pierre Morel <pmorel@linux.ibm.com>
>> ---
>> lib/s390x/css.h | 4 ++
>> lib/s390x/css_lib.c | 5 +--
>> s390x/css.c | 105
>> ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 111
>> insertions(+), 3 deletions(-)
>>
>> diff --git a/lib/s390x/css.h b/lib/s390x/css.h
>> index 1603781..e1e9264 100644
>> --- a/lib/s390x/css.h
>> +++ b/lib/s390x/css.h
>> @@ -90,6 +90,9 @@ struct scsw {
>> #define SCSW_ESW_FORMAT 0x04000000
>> #define SCSW_SUSPEND_CTRL 0x08000000
>> #define SCSW_KEY 0xf0000000
>> +#define SCSW_SSCH_COMPLETED (SCSW_CCW_FORMAT | SCSW_FC_START
>> | \
>> + SCSW_SC_PENDING | SCSW_SC_SECONDARY
>> | \
>> + SCSW_SC_PRIMARY)
>> uint32_t ctrl;
>> uint32_t ccw_addr;
>> #define SCSW_DEVS_DEV_END 0x04
>> @@ -138,6 +141,7 @@ struct irb {
>> uint32_t ecw[8];
>> uint32_t emw[8];
>> } __attribute__ ((aligned(4)));
>> +extern struct irb irb;
>>
>> #define CCW_CMD_SENSE_ID 0xe4
>> #define CSS_SENSEID_COMMON_LEN 8
>> diff --git a/lib/s390x/css_lib.c b/lib/s390x/css_lib.c
>> index 55e70e6..7c93e94 100644
>> --- a/lib/s390x/css_lib.c
>> +++ b/lib/s390x/css_lib.c
>> @@ -21,6 +21,7 @@
>>
>> struct schib schib;
>> struct chsc_scsc *chsc_scsc;
>> +struct irb irb;
>>
>> static const char * const chsc_rsp_description[] = {
>> "CHSC unknown error",
>> @@ -415,8 +416,6 @@ bool css_disable_mb(int schid)
>> return retry_count > 0;
>> }
>>
>> -static struct irb irb;
>> -
>> void css_irq_io(void)
>> {
>> int ret = 0;
>> @@ -512,7 +511,7 @@ int check_io_completion(int schid, uint32_t ctrl)
>>
>> report_prefix_push("check I/O completion");
>>
>> - if (lowcore_ptr->io_int_param != schid) {
>> + if (!ctrl && lowcore_ptr->io_int_param != schid) {
>> report(0, "interrupt parameter: expected %08x got
>> %08x", schid, lowcore_ptr->io_int_param);
>> ret = -1;
>> diff --git a/s390x/css.c b/s390x/css.c
>> index 57dc340..f6890f2 100644
>> --- a/s390x/css.c
>> +++ b/s390x/css.c
>> @@ -15,6 +15,7 @@
>> #include <interrupt.h>
>> #include <asm/arch_def.h>
>> #include <alloc_page.h>
>> +#include <sclp.h>
>>
>> #include <malloc_io.h>
>> #include <css.h>
>> @@ -55,6 +56,109 @@ static void test_enable(void)
>> report(cc == 0, "Enable subchannel %08x", test_device_sid);
>> }
>>
>> +static void test_ssch(void)
>> +{
>> + struct orb orb = {
>> + .intparm = test_device_sid,
>> + .ctrl = ORB_CTRL_ISIC | ORB_CTRL_FMT | ORB_LPM_DFLT,
>> + };
>> + int i;
>> + phys_addr_t top;
>> +
>> + NODEV_SKIP(test_device_sid);
>> +
>> + assert(css_enable(test_device_sid, 0) == 0);
>> +
>> + /* 1- ORB address should be aligned on 32 bits */
>> + report_prefix_push("ORB alignment");
>> + expect_pgm_int();
>> + ssch(test_device_sid, (void *)0x110002);
>
> I don't like using random hardcoded addresses. can you use a valid
> address for it? either allocate it or use a static buffer.
OK, I can make it differently.
>
>> + check_pgm_int_code(PGM_INT_CODE_SPECIFICATION);
>> + report_prefix_pop();
>> +
>> + /* 2- ORB address should be lower than 2G */
>> + report_prefix_push("ORB Address above 2G");
>> + expect_pgm_int();
>> + ssch(test_device_sid, (void *)0x80000000);
>
> another hardcoded address... you should try allocating memory over 2G,
> and try to use it. put a check if there is enough memory, and skip if
> you do not have enough memory, like you did below
OK, you are right, here I can not know if the memory is available at
this address.
>
>> + check_pgm_int_code(PGM_INT_CODE_ADDRESSING);
>> + report_prefix_pop();
>> +
>> + /* 3- ORB address should be available we check 1G*/
>> + top = get_ram_size();
>> + report_prefix_push("ORB Address must be available");
>> + if (top < 0x40000000) {
>> + expect_pgm_int();
>> + ssch(test_device_sid, (void *)0x40000000);
>> + check_pgm_int_code(PGM_INT_CODE_ADDRESSING);
>> + } else {
>> + report_skip("guest started with more than 1G
>> memory");
>
> this is what I meant above. you will need to run this test both with 1G
> and with 3G of ram (look at the SCLP test, it has the same issue)
OK thanks, will take example from it.
>
>> + }
>> + report_prefix_pop();
>> +
>> + /* 3- ORB address should not be equal or above 2G */
>
> the comment seems the same as the one above, maybe clarify that here
> you mean the address inside the ORB, instead of the address of the ORB
> itself
cut and past and forgot to adapt: here I check the CCW address not the
ORB address
>
>> + report_prefix_push("CCW address above 2G");
>> + orb.cpa = 0x80000000;
>
> and again, please no hardcoded values; put a check that enough memory
> is available, and allocate from >2GB
and again.. yes
>
>> + expect_pgm_int();
>> + ssch(test_device_sid, &orb);
>> + check_pgm_int_code(PGM_INT_CODE_OPERAND);
>> + report_prefix_pop();
>> +
>> + senseid = alloc_io_mem(sizeof(*senseid), 0);
>> + assert(senseid);
>> + orb.cpa = (uint64_t)ccw_alloc(CCW_CMD_SENSE_ID, senseid,
>> + sizeof(*senseid), CCW_F_SLI);
>> + assert(orb.cpa);
>> +
>> + /* 4- Start on a disabled subchannel */
>> + report_prefix_push("Disabled subchannel");
>> + assert(css_disable(test_device_sid) == 0);
>> + report(ssch(test_device_sid, &orb) == 3, "CC = 3");
>> + report_prefix_pop();
>> +
>> + /* 5- MIDAW is not supported by the firmware */
>> + report_prefix_push("ORB MIDAW unsupported");
>> + assert(css_enable(test_device_sid, 0) == 0);
>> + orb.ctrl |= ORB_CTRL_MIDAW;
>> + expect_pgm_int();
>> + ssch(test_device_sid, &orb);
>> + check_pgm_int_code(PGM_INT_CODE_OPERAND);
>> + report_prefix_pop();
>> + orb.ctrl = 0;
>> +
>> + /* 6-12- Check the reserved bits of the ORB CTRL field */
>> + for (i = 0; i < 5; i++) {
>> + char buffer[30];
>> +
>> + orb.ctrl = (0x02 << i);
>> + snprintf(buffer, 30, "ORB reserved ctrl flags %02x",
>> orb.ctrl);
>> + report_prefix_push(buffer);
>> + expect_pgm_int();
>> + ssch(test_device_sid, &orb);
>> + check_pgm_int_code(PGM_INT_CODE_OPERAND);
>> + report_prefix_pop();
>> + }
>> +
>> + /* 13- check the reserved bits of the ORB flags */
>> + report_prefix_push("ORB wrong ctrl flags");
>> + orb.ctrl |= 0x040000;
>
> do you need the magic constant, or can you define a name for it? (or is
> even a name already defined?)
I can define this
...snip...
Thanks for the comments,
Regards,
Pierre
--
Pierre Morel
IBM Lab Boeblingen
next prev parent reply other threads:[~2021-03-25 17:24 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-25 9:38 [kvm-unit-tests PATCH v2 0/8] Testing SSCH, CSCH and HSCH for errors Pierre Morel
2021-03-25 9:39 ` [kvm-unit-tests PATCH v2 1/8] s390x: lib: css: disabling a subchannel Pierre Morel
2021-03-25 14:52 ` Claudio Imbrenda
2021-03-25 16:10 ` Pierre Morel
2021-03-26 8:26 ` Janosch Frank
2021-03-26 9:02 ` Pierre Morel
2021-03-29 8:00 ` Thomas Huth
2021-03-29 12:33 ` Pierre Morel
2021-03-25 9:39 ` [kvm-unit-tests PATCH v2 2/8] s390x: lib: css: SCSW bit definitions Pierre Morel
2021-03-25 15:00 ` Claudio Imbrenda
2021-03-25 16:13 ` Pierre Morel
2021-03-29 8:09 ` Thomas Huth
2021-03-29 12:25 ` Pierre Morel
2021-03-30 11:49 ` Cornelia Huck
2021-03-30 12:59 ` Pierre Morel
2021-03-25 9:39 ` [kvm-unit-tests PATCH v2 3/8] s390x: css: simplify skipping tests on no device Pierre Morel
2021-03-25 15:21 ` Claudio Imbrenda
2021-03-25 16:21 ` Pierre Morel
2021-03-26 8:41 ` Janosch Frank
2021-03-26 9:04 ` Pierre Morel
2021-03-29 8:19 ` Thomas Huth
2021-03-29 12:39 ` Pierre Morel
2021-03-29 12:50 ` Pierre Morel
2021-03-30 11:52 ` Cornelia Huck
2021-03-30 12:58 ` Pierre Morel
2021-03-25 9:39 ` [kvm-unit-tests PATCH v2 4/8] s390x: lib: css: separate wait for IRQ and check I/O completion Pierre Morel
2021-03-25 15:24 ` Claudio Imbrenda
2021-03-25 16:23 ` Pierre Morel
2021-03-29 8:21 ` Thomas Huth
2021-03-29 11:00 ` Pierre Morel
2021-03-30 11:57 ` Cornelia Huck
2021-03-30 12:57 ` Pierre Morel
2021-04-01 8:24 ` Pierre Morel
2021-03-25 9:39 ` [kvm-unit-tests PATCH v2 5/8] s390x: lib: css: add SCSW ctrl expectations to " Pierre Morel
2021-03-25 15:40 ` Claudio Imbrenda
2021-03-29 8:27 ` Thomas Huth
2021-03-29 8:32 ` Thomas Huth
2021-03-29 11:01 ` Pierre Morel
2021-03-29 11:02 ` Pierre Morel
2021-03-30 12:10 ` Cornelia Huck
2021-03-30 12:54 ` Pierre Morel
2021-03-25 9:39 ` [kvm-unit-tests PATCH v2 6/8] s390x: css: testing ssch error response Pierre Morel
2021-03-25 16:02 ` Claudio Imbrenda
2021-03-25 17:23 ` Pierre Morel [this message]
2021-03-26 10:41 ` Pierre Morel
2021-03-26 10:58 ` Claudio Imbrenda
2021-03-29 7:42 ` Pierre Morel
2021-03-30 13:01 ` Pierre Morel
2021-03-29 9:40 ` Pierre Morel
2021-03-25 9:39 ` [kvm-unit-tests PATCH v2 7/8] s390x: css: testing halt subchannel Pierre Morel
2021-03-25 9:39 ` [kvm-unit-tests PATCH v2 8/8] s390x: css: testing clear subchannel Pierre Morel
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=2e1c410d-3c97-e169-903f-a3a5ac7cdcec@linux.ibm.com \
--to=pmorel@linux.ibm.com \
--cc=cohuck@redhat.com \
--cc=david@redhat.com \
--cc=frankja@linux.ibm.com \
--cc=imbrenda@linux.ibm.com \
--cc=kvm@vger.kernel.org \
--cc=thuth@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox