From: Binbin Wu <binbin.wu@linux.intel.com>
To: Robert Hoo <robert.hu@linux.intel.com>,
pbonzini@redhat.com, seanjc@google.com,
kirill.shutemov@linux.intel.com, kvm@vger.kernel.org
Subject: Re: [PATCH v3 1/9] KVM: x86: Rename cr4_reserved/rsvd_* variables to be more readable
Date: Wed, 28 Dec 2022 11:37:27 +0800 [thread overview]
Message-ID: <2e395a24-ee7b-e31e-981c-b83e80ac5be1@linux.intel.com> (raw)
In-Reply-To: <20221209044557.1496580-2-robert.hu@linux.intel.com>
On 12/9/2022 12:45 PM, Robert Hoo wrote:
> kvm_vcpu_arch::cr4_guest_owned_bits and kvm_vcpu_arch::cr4_guest_rsvd_bits
> looks confusing. Rename latter to cr4_host_rsvd_bits, because it in fact
> decribes the effective host reserved cr4 bits from the vcpu's perspective.
IMO, the current name cr4_guest_rsvd_bits is OK becuase it shows that
these bits are reserved bits from the pointview of guest.
Change to *host* is OK, but seems not easier to understand.
>
> Meanwhile, rename other related variables/macros to be better descriptive:
> * CR4_RESERVED_BITS --> CR4_HOST_RESERVED_BITS, which describes host bare
> metal CR4 reserved bits.
>
> * cr4_reserved_bits --> cr4_kvm_reserved_bits, which describes
> CR4_HOST_RESERVED_BITS + !kvm_cap_has() = kvm level cr4 reserved bits.
>
> * __cr4_reserved_bits() --> __cr4_calc_reserved_bits(), which to calc
> effective cr4 reserved bits for kvm or vm level, by corresponding
> x_cpu_has() input.
>
> Thus, by these renames, the hierarchical relations of those reserved CR4
> bits is more clear.
>
> Just renames, no functional changes intended.
>
> Signed-off-by: Robert Hoo <robert.hu@linux.intel.com>
> ---
> arch/x86/include/asm/kvm_host.h | 4 ++--
> arch/x86/kvm/cpuid.c | 4 ++--
> arch/x86/kvm/vmx/vmx.c | 2 +-
> arch/x86/kvm/x86.c | 12 ++++++------
> arch/x86/kvm/x86.h | 4 ++--
> 5 files changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> index f05ebaa26f0f..3c736e00b6b1 100644
> --- a/arch/x86/include/asm/kvm_host.h
> +++ b/arch/x86/include/asm/kvm_host.h
> @@ -114,7 +114,7 @@
> | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
> | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
>
> -#define CR4_RESERVED_BITS \
> +#define CR4_HOST_RESERVED_BITS \
> (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
> | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
> | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
> @@ -671,7 +671,7 @@ struct kvm_vcpu_arch {
> unsigned long cr3;
> unsigned long cr4;
> unsigned long cr4_guest_owned_bits;
> - unsigned long cr4_guest_rsvd_bits;
> + unsigned long cr4_host_rsvd_bits;
> unsigned long cr8;
> u32 host_pkru;
> u32 pkru;
> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> index c92c49a0b35b..01e2b93ef563 100644
> --- a/arch/x86/kvm/cpuid.c
> +++ b/arch/x86/kvm/cpuid.c
> @@ -352,8 +352,8 @@ static void kvm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu)
> vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
>
> kvm_pmu_refresh(vcpu);
> - vcpu->arch.cr4_guest_rsvd_bits =
> - __cr4_reserved_bits(guest_cpuid_has, vcpu);
> + vcpu->arch.cr4_host_rsvd_bits =
> + __cr4_calc_reserved_bits(guest_cpuid_has, vcpu);
>
> kvm_hv_set_cpuid(vcpu, kvm_cpuid_has_hyperv(vcpu->arch.cpuid_entries,
> vcpu->arch.cpuid_nent));
> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index 63247c57c72c..cfa06c7c062e 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -4250,7 +4250,7 @@ void set_cr4_guest_host_mask(struct vcpu_vmx *vmx)
> struct kvm_vcpu *vcpu = &vmx->vcpu;
>
> vcpu->arch.cr4_guest_owned_bits = KVM_POSSIBLE_CR4_GUEST_BITS &
> - ~vcpu->arch.cr4_guest_rsvd_bits;
> + ~vcpu->arch.cr4_host_rsvd_bits;
> if (!enable_ept) {
> vcpu->arch.cr4_guest_owned_bits &= ~X86_CR4_TLBFLUSH_BITS;
> vcpu->arch.cr4_guest_owned_bits &= ~X86_CR4_PDPTR_BITS;
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 69227f77b201..eb1f2c20e19e 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -108,7 +108,7 @@ u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
> static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
> #endif
>
> -static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
> +static u64 __read_mostly cr4_kvm_reserved_bits = CR4_HOST_RESERVED_BITS;
>
> #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
>
> @@ -1102,10 +1102,10 @@ EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
>
> bool __kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
> {
> - if (cr4 & cr4_reserved_bits)
> + if (cr4 & cr4_kvm_reserved_bits)
> return false;
>
> - if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
> + if (cr4 & vcpu->arch.cr4_host_rsvd_bits)
> return false;
>
> return true;
> @@ -12290,7 +12290,7 @@ int kvm_arch_hardware_setup(void *opaque)
> kvm_caps.supported_xss = 0;
>
> #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
> - cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
> + cr4_kvm_reserved_bits = __cr4_calc_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
> #undef __kvm_cpu_cap_has
>
> if (kvm_caps.has_tsc_control) {
> @@ -12323,8 +12323,8 @@ int kvm_arch_check_processor_compat(void *opaque)
>
> WARN_ON(!irqs_disabled());
>
> - if (__cr4_reserved_bits(cpu_has, c) !=
> - __cr4_reserved_bits(cpu_has, &boot_cpu_data))
> + if (__cr4_calc_reserved_bits(cpu_has, c) !=
> + __cr4_calc_reserved_bits(cpu_has, &boot_cpu_data))
> return -EIO;
>
> return ops->check_processor_compatibility();
> diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
> index 829d3134c1eb..d92e580768e5 100644
> --- a/arch/x86/kvm/x86.h
> +++ b/arch/x86/kvm/x86.h
> @@ -452,9 +452,9 @@ bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type);
> #define KVM_MSR_RET_INVALID 2 /* in-kernel MSR emulation #GP condition */
> #define KVM_MSR_RET_FILTERED 3 /* #GP due to userspace MSR filter */
>
> -#define __cr4_reserved_bits(__cpu_has, __c) \
> +#define __cr4_calc_reserved_bits(__cpu_has, __c) \
> ({ \
> - u64 __reserved_bits = CR4_RESERVED_BITS; \
> + u64 __reserved_bits = CR4_HOST_RESERVED_BITS; \
> \
> if (!__cpu_has(__c, X86_FEATURE_XSAVE)) \
> __reserved_bits |= X86_CR4_OSXSAVE; \
next prev parent reply other threads:[~2022-12-28 3:37 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-09 4:45 [PATCH v3 0/9] Linear Address Masking (LAM) KVM Enabling Robert Hoo
2022-12-09 4:45 ` [PATCH v3 1/9] KVM: x86: Rename cr4_reserved/rsvd_* variables to be more readable Robert Hoo
2022-12-28 3:37 ` Binbin Wu [this message]
2022-12-29 1:42 ` Robert Hoo
2023-01-07 0:35 ` Sean Christopherson
2023-01-07 13:30 ` Robert Hoo
2023-01-08 14:18 ` Xiaoyao Li
2023-01-09 3:07 ` Robert Hoo
2022-12-09 4:45 ` [PATCH v3 2/9] KVM: x86: Add CR4.LAM_SUP in guest owned bits Robert Hoo
2023-01-07 0:38 ` Sean Christopherson
2023-01-07 13:32 ` Robert Hoo
2023-01-09 16:29 ` Sean Christopherson
2023-01-10 3:56 ` Robert Hoo
2023-01-11 17:35 ` Sean Christopherson
2022-12-09 4:45 ` [PATCH v3 3/9] KVM: x86: MMU: Rename get_cr3() --> get_pgd() and clear high bits for pgd Robert Hoo
2022-12-19 6:44 ` Yuan Yao
2022-12-20 14:07 ` Robert Hoo
2023-01-07 0:45 ` Sean Christopherson
2023-01-07 13:36 ` Robert Hoo
2022-12-09 4:45 ` [PATCH v3 4/9] KVM: x86: MMU: Commets update Robert Hoo
2022-12-09 4:45 ` [PATCH v3 5/9] KVM: x86: MMU: Integrate LAM bits when build guest CR3 Robert Hoo
2022-12-19 6:53 ` Yuan Yao
2022-12-20 14:07 ` Robert Hoo
2022-12-21 2:12 ` Yuan Yao
2022-12-21 7:50 ` Yu Zhang
2022-12-21 8:55 ` Robert Hoo
2022-12-09 4:45 ` [PATCH v3 6/9] KVM: x86: Untag LAM bits when applicable Robert Hoo
2022-12-19 7:32 ` Yuan Yao
2022-12-20 14:07 ` Robert Hoo
2022-12-19 9:45 ` Yuan Yao
2022-12-20 14:07 ` Robert Hoo
2022-12-21 2:38 ` Yuan Yao
2022-12-21 8:02 ` Yu Zhang
2022-12-21 8:49 ` Robert Hoo
2022-12-21 10:10 ` Yu Zhang
2022-12-21 10:30 ` Yuan Yao
2022-12-21 12:40 ` Yu Zhang
2022-12-22 8:21 ` Yu Zhang
2022-12-23 2:36 ` Yuan Yao
2022-12-23 3:55 ` Robert Hoo
2022-12-21 0:35 ` Yang, Weijiang
2022-12-21 1:38 ` Robert Hoo
2022-12-21 2:55 ` Yuan Yao
2022-12-21 8:22 ` Robert Hoo
2022-12-21 9:35 ` Yuan Yao
2022-12-21 10:22 ` Yu Zhang
2022-12-21 10:33 ` Yuan Yao
2022-12-21 8:14 ` Yu Zhang
2022-12-21 8:37 ` Yu Zhang
2022-12-28 8:32 ` Binbin Wu
2022-12-29 0:41 ` Robert Hoo
2022-12-09 4:45 ` [PATCH v3 7/9] KVM: x86: When judging setting CR3 valid or not, consider LAM bits Robert Hoo
2022-12-09 4:45 ` [PATCH v3 8/9] KVM: x86: When guest set CR3, handle LAM bits semantics Robert Hoo
2022-12-20 9:10 ` Liu, Jingqi
2022-12-20 14:16 ` Robert Hoo
2022-12-21 8:30 ` Yu Zhang
2022-12-21 12:52 ` Robert Hoo
2022-12-09 4:45 ` [PATCH v3 9/9] KVM: x86: LAM: Expose LAM CPUID to user space VMM Robert Hoo
2022-12-19 6:12 ` [PATCH v3 0/9] Linear Address Masking (LAM) KVM Enabling Robert Hoo
2022-12-19 8:09 ` Yuan Yao
2022-12-20 14:06 ` Robert Hoo
2022-12-20 9:20 ` Liu, Jingqi
2022-12-20 14:19 ` Robert Hoo
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