From mboxrd@z Thu Jan 1 00:00:00 1970 From: Arjan van de Ven Subject: Re: [RFC,05/10] x86/speculation: Add basic IBRS support infrastructure Date: Mon, 29 Jan 2018 12:44:16 -0800 Message-ID: <31415b7f-9c76-c102-86cd-6bf4e23e3aee@linux.intel.com> References: <1516476182-5153-6-git-send-email-karahmed@amazon.de> <20180129201404.GA1588@localhost.localdomain> <1517257022.18619.30.camel@infradead.org> <20180129204256.GV25150@localhost.localdomain> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Cc: KarimAllah Ahmed , linux-kernel@vger.kernel.org, Andi Kleen , Andrea Arcangeli , Andy Lutomirski , Ashok Raj , Asit Mallick , Borislav Petkov , Dan Williams , Dave Hansen , Greg Kroah-Hartman , "H . Peter Anvin" , Ingo Molnar , Janakarajan Natarajan , Joerg Roedel , Jun Nakajima , Laura Abbott , Linus Torvalds , Masami Hiramatsu , Paolo Bonzini , To: Eduardo Habkost , David Woodhouse Return-path: In-Reply-To: <20180129204256.GV25150@localhost.localdomain> Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org List-Id: kvm.vger.kernel.org On 1/29/2018 12:42 PM, Eduardo Habkost wrote: > The question is how the hypervisor could tell that to the guest. > If Intel doesn't give us a CPUID bit that can be used to tell > that retpolines are enough, maybe we should use a hypervisor > CPUID bit for that? the objective is to have retpoline be safe everywhere and never use IBRS (Linus was also pretty clear about that) so I'm confused by your question