From: "Chang S. Bae" <chang.seok.bae@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: <seanjc@google.com>, <kvm@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <chao.gao@intel.com>
Subject: Re: [PATCH v3 01/20] KVM: VMX: Macrofy 64-bit GPR swapping in __vmx_vcpu_run()
Date: Wed, 29 Apr 2026 10:22:22 -0700 [thread overview]
Message-ID: <3bba4988-31d3-4b36-b3a1-2307ad3ed4b9@intel.com> (raw)
In-Reply-To: <CABgObfbgt35yN+o4w_D5U8A7QKRWxiwEtUuzzK39eScXNa4EfQ@mail.gmail.com>
On 4/29/2026 12:50 AM, Paolo Bonzini wrote:
> On Tue, Apr 28, 2026 at 10:12 PM Chang S. Bae <chang.seok.bae@intel.com> wrote:
>> On 4/28/2026 2:03 AM, Paolo Bonzini wrote:
>>> I would also consider using inst.h's name-to-index conversion:
>>>
>>> .macro LOAD_GPRS src:req, regs_ofs:req, regs:vararg
>>> .irp reg, \regs
>>> #ifdef CONFIG_X86_64
>>> R64_NUM reg_num \reg
>>> #else
>>> R32_NUM reg_num \reg
>>> #endif
>>> .if \reg_num <> REG_NUM_INVALID
>>> mov (\regs_ofs + \reg_num * WORD_SIZE)(%_ASM_DI), \reg
>>> .else
>>> .err invalid register \reg
>>> .endif
>>> .endr
>>> .endm
>> Yup! Also, looks like still needs the REG_TYPE macro:
>
> I don't think so, you can (and should) assume that \reg has WORD_SIZE
> size (i.e. disallow %eax if CONFIG_X86_64 is set). Only CLEAR_REGS
> uses smaller registers but it does not need the reg_num.
Okay, I think I didn't close look at the error. Simply "\reg_num" to
"reg_num" builds fine. Yes, REG_TYPE can go away.
Thanks,
Chang
next prev parent reply other threads:[~2026-04-29 17:22 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-28 5:00 [PATCH v3 00/20] KVM: x86: Enable APX for guests Chang S. Bae
2026-04-28 5:00 ` [PATCH v3 01/20] KVM: VMX: Macrofy 64-bit GPR swapping in __vmx_vcpu_run() Chang S. Bae
2026-04-28 9:03 ` Paolo Bonzini
2026-04-28 20:12 ` Chang S. Bae
2026-04-29 7:50 ` Paolo Bonzini
2026-04-29 17:22 ` Chang S. Bae [this message]
2026-04-28 9:09 ` Paolo Bonzini
2026-04-28 5:00 ` [PATCH v3 02/20] KVM: SVM: Macrofy 64-bit GPR swapping in __svm_vcpu_run() Chang S. Bae
2026-04-28 5:00 ` [PATCH v3 03/20] KVM: SEV: Macrofy 64-bit GPR swapping in __svm_sev_es_vcpu_run() Chang S. Bae
2026-04-28 5:00 ` [PATCH v3 04/20] KVM: x86: Extend VCPU registers for EGPRs Chang S. Bae
2026-04-28 5:00 ` [PATCH v3 05/20] KVM: VMX: Save guest EGPRs in VCPU cache Chang S. Bae
2026-04-28 5:00 ` [PATCH v3 06/20] KVM: x86: Support APX state for XSAVE ABI Chang S. Bae
2026-04-28 9:31 ` Paolo Bonzini
2026-04-28 5:00 ` [PATCH v3 07/20] KVM: VMX: Refactor VMX instruction information access Chang S. Bae
2026-04-28 5:00 ` [PATCH v3 08/20] KVM: VMX: Refactor instruction information decoding Chang S. Bae
2026-04-28 5:01 ` [PATCH v3 09/20] KVM: VMX: Refactor register index retrieval from exit qualification Chang S. Bae
2026-04-28 5:01 ` [PATCH v3 10/20] KVM: VMX: Support instruction information extension Chang S. Bae
2026-04-28 5:01 ` [PATCH v3 11/20] KVM: nVMX: Propagate the extended instruction info field Chang S. Bae
2026-04-28 5:01 ` [PATCH v3 12/20] KVM: x86: Support EGPR accessing and tracking for emulator Chang S. Bae
2026-04-28 5:01 ` [PATCH v3 13/20] KVM: x86: Handle EGPR index and REX2-incompatible opcodes Chang S. Bae
2026-04-28 5:01 ` [PATCH v3 14/20] KVM: x86: Support REX2-prefixed opcode decode Chang S. Bae
2026-04-28 5:01 ` [PATCH v3 15/20] KVM: x86: Reject EVEX-prefixed instructions Chang S. Bae
2026-04-28 5:01 ` [PATCH v3 16/20] KVM: x86: Guard valid XCR0.APX settings Chang S. Bae
2026-04-28 5:01 ` [PATCH v3 17/20] KVM: x86: Expose APX foundation feature to guests Chang S. Bae
2026-04-28 5:01 ` [PATCH v3 18/20] KVM: x86: Expose APX sub-features " Chang S. Bae
2026-04-28 5:01 ` [PATCH v3 19/20] KVM: x86: selftests: Add APX state and ABI test Chang S. Bae
2026-04-28 5:01 ` [PATCH v3 20/20] KVM: x86: selftests: Add APX state handling and XCR0 sanity checks Chang S. Bae
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