From: Nikhil Kumar Singh <nikhilks@linux.ibm.com>
To: Aditya Gupta <adityag@linux.ibm.com>,
qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
Harsh Prateek Bora <harshpb@linux.ibm.com>
Cc: "Cédric Le Goater" <clg@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>,
"Shivang Upadhyay" <shivangu@linux.ibm.com>,
"Daniel P . Berrangé" <berrange@redhat.com>,
"Sourabh Jain" <sourabhjain@linux.ibm.com>,
"Hari Bathini" <hbathini@linux.ibm.com>,
"Nicholas Piggin" <npiggin@gmail.com>,
"Miles Glenn" <milesg@linux.ibm.com>,
"Fabiano Rosas" <farosas@suse.de>,
"Laurent Vivier" <lvivier@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
devel@lists.libvirt.org,
"Misbah Anjum N" <misanjum@linux.ibm.com>,
"Anushree Mathur" <anushree.mathur@linux.ibm.com>,
"Pierrick Bouvier" <pierrick.bouvier@oss.qualcomm.com>,
kvm@vger.kernel.org, "Gautam Menghani" <gautam@linux.ibm.com>,
"Chinmay Rath" <rathc@linux.ibm.com>,
"BALATON Zoltan" <balaton@eik.bme.hu>
Subject: Re: [PATCH v4 3/8] tests/qtest: Add Power11 chip & machine to qtests
Date: Wed, 1 Jul 2026 07:37:17 +0530 [thread overview]
Message-ID: <444f825f-e1bd-4f31-81dc-e6916b1b79b5@linux.ibm.com> (raw)
In-Reply-To: <20260630210355.789109-4-adityag@linux.ibm.com>
Thanks for addressing the comments I raised on v1. The changes look good
to me.
Reviewed-by: Nikhil Kumar Singh <nikhilks@linux.ibm.com>
~ Nikhil
On 01/07/26 02:33, Aditya Gupta wrote:
> Previously the machines/chips tested by qtest was till Power10, update
> the tests to also test PowerNV11 and Power11 PNV Chip
>
> Since if-else-if ladder was common pattern to get machine type,
> implement pnv_get_machine_type so new processor cases can be implemented
> in one location in pnv_get_machine_type
>
> While at it, also add g_autofree to allocation by g_strdup_printf in
> modified tests
>
> Tested-by: Misbah Anjum N<misanjum@linux.ibm.com>
> Signed-off-by: Aditya Gupta<adityag@linux.ibm.com>
> ---
> tests/qtest/pnv-host-i2c-test.c | 10 ++++------
> tests/qtest/pnv-spi-seeprom-test.c | 2 +-
> tests/qtest/pnv-xive2-test.c | 21 +++++++++++++++++----
> tests/qtest/pnv-xscom-test.c | 22 +++++-----------------
> tests/qtest/pnv-xscom.h | 29 ++++++++++++++++++++++++++---
> 5 files changed, 53 insertions(+), 31 deletions(-)
>
> diff --git a/tests/qtest/pnv-host-i2c-test.c b/tests/qtest/pnv-host-i2c-test.c
> index 51e613ebdcb2..5fd54f9de771 100644
> --- a/tests/qtest/pnv-host-i2c-test.c
> +++ b/tests/qtest/pnv-host-i2c-test.c
> @@ -402,15 +402,14 @@ static void reset_all(QTestState *qts, const PnvChip *chip)
> static void test_host_i2c(const void *data)
> {
> const PnvChip *chip = data;
> + const char *machine = pnv_get_machine_type(chip->chip_type);
> QTestState *qts;
> - const char *machine = "powernv8";
> PnvI2cCtlr ctlr;
> PnvI2cDev pca9552;
> PnvI2cDev pca9554;
>
> - if (chip->chip_type == PNV_CHIP_POWER9) {
> - machine = "powernv9";
> - } else if (chip->chip_type == PNV_CHIP_POWER10) {
> + /* i2c is initialised for rainier in case of P10 */
> + if (chip->chip_type == PNV_CHIP_POWER10) {
> machine = "powernv10-rainier";
> }
>
> @@ -473,10 +472,9 @@ static void add_test(const char *name, void (*test)(const void *data))
> int i;
>
> for (i = 0; i < ARRAY_SIZE(pnv_chips); i++) {
> - char *tname = g_strdup_printf("pnv-xscom/%s/%s", name,
> + g_autofree char *tname = g_strdup_printf("pnv-xscom/%s/%s", name,
> pnv_chips[i].cpu_model);
> qtest_add_data_func(tname, &pnv_chips[i], test);
> - g_free(tname);
> }
> }
>
> diff --git a/tests/qtest/pnv-spi-seeprom-test.c b/tests/qtest/pnv-spi-seeprom-test.c
> index 1a78e8d966a5..8bb30eb649aa 100644
> --- a/tests/qtest/pnv-spi-seeprom-test.c
> +++ b/tests/qtest/pnv-spi-seeprom-test.c
> @@ -77,7 +77,7 @@ static void test_spi_seeprom(const void *data)
> const PnvChip *chip = data;
> QTestState *qts = NULL;
> g_autofree char *tmp_path = NULL;
> - const char *machine = "powernv10";
> + const char *machine = pnv_get_machine_type(chip->chip_type);
> int ret;
> int fd;
>
> diff --git a/tests/qtest/pnv-xive2-test.c b/tests/qtest/pnv-xive2-test.c
> index 5313d4ef18b7..9f67a0066864 100644
> --- a/tests/qtest/pnv-xive2-test.c
> +++ b/tests/qtest/pnv-xive2-test.c
> @@ -14,6 +14,7 @@
> #include "libqtest.h"
>
> #include "pnv-xive2-common.h"
> +#include "pnv-xscom.h"
> #include "hw/intc/pnv_xive2_regs.h"
> #include "hw/ppc/xive_regs.h"
> #include "hw/ppc/xive2_regs.h"
> @@ -544,14 +545,16 @@ static void test_hw_group_irq_backlog(QTestState *qts)
> g_assert_cmphex(lsmfb, ==, 0xFF);
> }
>
> -static void test_xive(void)
> +static void test_xive(const void *data)
> {
> + const PnvChip *chip = data;
> + const char *machine = pnv_get_machine_type(chip->chip_type);
> QTestState *qts;
>
> - qts = qtest_initf("-M powernv10 -smp %d,cores=1,threads=%d -nographic "
> + qts = qtest_initf("-M %s -smp %d,cores=1,threads=%d -nographic "
> "-nodefaults -serial mon:stdio -S "
> "-d guest_errors -trace '*xive*'",
> - SMT, SMT);
> + machine, SMT, SMT);
> init_xive(qts);
>
> test_hw_irq(qts);
> @@ -580,6 +583,16 @@ static void test_xive(void)
> int main(int argc, char **argv)
> {
> g_test_init(&argc, &argv, NULL);
> - qtest_add_func("xive2", test_xive);
> +
> + for (int i = 0; i < ARRAY_SIZE(pnv_chips); i++) {
> + /* xive2 exists from Power10 onwards */
> + if (pnv_chips[i].chip_type < PNV_CHIP_POWER10) {
> + continue;
> + }
> +
> + g_autofree char *tname = g_strdup_printf("pnv-xive2/%s",
> + pnv_chips[i].cpu_model);
> + qtest_add_data_func(tname, &pnv_chips[i], test_xive);
> + }
> return g_test_run();
> }
> diff --git a/tests/qtest/pnv-xscom-test.c b/tests/qtest/pnv-xscom-test.c
> index c814c0f4f5b1..94b50c071c02 100644
> --- a/tests/qtest/pnv-xscom-test.c
> +++ b/tests/qtest/pnv-xscom-test.c
> @@ -28,15 +28,9 @@ static void test_xscom_cfam_id(QTestState *qts, const PnvChip *chip)
> static void test_cfam_id(const void *data)
> {
> const PnvChip *chip = data;
> - const char *machine = "powernv8";
> + const char *machine = pnv_get_machine_type(chip->chip_type);
> QTestState *qts;
>
> - if (chip->chip_type == PNV_CHIP_POWER9) {
> - machine = "powernv9";
> - } else if (chip->chip_type == PNV_CHIP_POWER10) {
> - machine = "powernv10";
> - }
> -
> qts = qtest_initf("-M %s -accel tcg -cpu %s",
> machine, chip->cpu_model);
> test_xscom_cfam_id(qts, chip);
> @@ -57,7 +51,8 @@ static void test_cfam_id(const void *data)
>
> static void test_xscom_core(QTestState *qts, const PnvChip *chip)
> {
> - if (chip->chip_type == PNV_CHIP_POWER10) {
> + if ((chip->chip_type == PNV_CHIP_POWER10) ||
> + (chip->chip_type == PNV_CHIP_POWER11)) {
> uint32_t first_core_thread_state =
> PNV_XSCOM_P10_EC_BASE(chip->first_core) + 0x412;
> uint64_t thread_state;
> @@ -84,14 +79,8 @@ static void test_xscom_core(QTestState *qts, const PnvChip *chip)
> static void test_core(const void *data)
> {
> const PnvChip *chip = data;
> + const char *machine = pnv_get_machine_type(chip->chip_type);
> QTestState *qts;
> - const char *machine = "powernv8";
> -
> - if (chip->chip_type == PNV_CHIP_POWER9) {
> - machine = "powernv9";
> - } else if (chip->chip_type == PNV_CHIP_POWER10) {
> - machine = "powernv10";
> - }
>
> qts = qtest_initf("-M %s -accel tcg -cpu %s",
> machine, chip->cpu_model);
> @@ -104,10 +93,9 @@ static void add_test(const char *name, void (*test)(const void *data))
> int i;
>
> for (i = 0; i < ARRAY_SIZE(pnv_chips); i++) {
> - char *tname = g_strdup_printf("pnv-xscom/%s/%s", name,
> + g_autofree char *tname = g_strdup_printf("pnv-xscom/%s/%s", name, pnv_chips[i].cpu_model); qtest_add_data_func(tname,
> &pnv_chips[i], test); - g_free(tname); } } diff --git
> a/tests/qtest/pnv-xscom.h b/tests/qtest/pnv-xscom.h index
> 5aa1701ea768..8e882dac9d36 100644 --- a/tests/qtest/pnv-xscom.h +++
> b/tests/qtest/pnv-xscom.h @@ -17,6 +17,7 @@ typedef enum PnvChipType {
> PNV_CHIP_POWER8NVL, /* AKA Naples */ PNV_CHIP_POWER9, /* AKA Nimbus */
> PNV_CHIP_POWER10, + PNV_CHIP_POWER11, } PnvChipType; typedef struct
> PnvChip { @@ -60,15 +61,23 @@ static const PnvChip pnv_chips[] = {
> .first_core = 0x0, .num_i2c = 4, }, + { + .chip_type =
> PNV_CHIP_POWER11, + .cpu_model = "Power11",
> + .xscom_base = 0x000603fc00000000ull,
> + .cfam_id = 0x220da04980000000ull,
> + .first_core = 0x0,
> + .num_i2c = 0,
> + },
> };
>
> static inline uint64_t pnv_xscom_addr(const PnvChip *chip, uint32_t pcba)
> {
> uint64_t addr = chip->xscom_base;
>
> - if (chip->chip_type == PNV_CHIP_POWER10) {
> - addr |= ((uint64_t) pcba << 3);
> - } else if (chip->chip_type == PNV_CHIP_POWER9) {
> + if ((chip->chip_type == PNV_CHIP_POWER11) ||
> + (chip->chip_type == PNV_CHIP_POWER10) ||
> + (chip->chip_type == PNV_CHIP_POWER9)) {
> addr |= ((uint64_t) pcba << 3);
> } else {
> addr |= (((uint64_t) pcba << 4) & ~0xffull) |
> @@ -77,4 +86,18 @@ static inline uint64_t pnv_xscom_addr(const PnvChip *chip, uint32_t pcba)
> return addr;
> }
>
> +static const char *pnv_get_machine_type(enum PnvChipType chip_type)
> +{
> + static const char *const machine_types[] = {
> + [PNV_CHIP_POWER8] = "powernv8",
> + [PNV_CHIP_POWER9] = "powernv9",
> + [PNV_CHIP_POWER10] = "powernv10",
> + [PNV_CHIP_POWER11] = "powernv11",
> + };
> +
> + g_assert(chip_type <= PNV_CHIP_POWER11);
> +
> + return machine_types[chip_type];
> +}
> +
> #endif /* PNV_XSCOM_H */
next prev parent reply other threads:[~2026-07-01 2:07 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-30 21:03 [PATCH v4 0/8] powerpc: Testcase improvements and Power8E/NVL removal Aditya Gupta
2026-06-30 21:03 ` [PATCH v4 1/8] tests/functional: Add remote interrupts test for PowerNV Aditya Gupta
2026-06-30 21:03 ` [PATCH v4 2/8] tests/qtest/pnv_spi: Test Power11 PNV_SPI Aditya Gupta
2026-07-01 2:02 ` Nikhil Kumar Singh
2026-06-30 21:03 ` [PATCH v4 3/8] tests/qtest: Add Power11 chip & machine to qtests Aditya Gupta
2026-07-01 2:07 ` Nikhil Kumar Singh [this message]
2026-06-30 21:03 ` [PATCH v4 4/8] tests/functional: Use default powernv machine instead of power10 Aditya Gupta
2026-06-30 21:03 ` [PATCH v4 5/8] ppc/pnv: Replace Power8E with Power11 for 'none' machine test Aditya Gupta
2026-06-30 21:03 ` [PATCH v4 6/8] ppc/pnv: Remove Power8E and Power8NVL pnv chips Aditya Gupta
2026-06-30 21:03 ` [PATCH v4 7/8] ppc/pnv: Remove Power8E and Power8NVL CPUs Aditya Gupta
2026-06-30 21:03 ` [PATCH v4 8/8] MAINTAINERS: Add self as maintainer for PowerNV Aditya Gupta
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