From mboxrd@z Thu Jan 1 00:00:00 1970 From: Avi Kivity Subject: Re: [PATCH] KVM: Avoid using vmx instruction directly Date: Tue, 21 Nov 2006 21:41:53 +0200 Message-ID: <45635681.2040504@qumranet.com> References: <20061109110852.A6B712500F7@cleopatra.q> <200611091429.42040.arnd@arndb.de> <45532EE3.4000104@qumranet.com> <200611091542.31101.arnd@arndb.de> <455340B8.2080206@qumranet.com> <4553BC18.6090207@goop.org> <45634704.8020407@zytor.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: kvm-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org, akpm-3NddpPZAyC0@public.gmane.org, Jeremy Fitzhardinge , linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Return-path: To: "H. Peter Anvin" In-Reply-To: <45634704.8020407-YMNOUZJC4hwAvxtiuMwx3w@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: kvm-devel-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org Errors-To: kvm-devel-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org List-Id: kvm.vger.kernel.org H. Peter Anvin wrote: > Jeremy Fitzhardinge wrote: >> Avi Kivity wrote: >>>> Or gcc >>>> might move the assignment of phys_addr to after the inline assembly. >>>> >>> "asm volatile" prevents that (and I'm not 100% sure it's necessary). >> >> No, it won't necessarily. "asm volatile" simply forces gcc to emit the >> assembler, even if it thinks its output doesn't get used. It makes no >> ordering guarantees with respect to other code (or even other "asm >> volatiles"). The "memory" clobbers should fix the ordering of the asms >> though. >> > > I think you're wrong about that; in particular, I'm pretty sure "asm > volatiles" are ordered among themselves. What the "volatile" means is > "this has side effects you (the compiler) don't understand", and gcc > can't assume that it can reorder such side effects. The gcc manual has this to say: Similarly, you can't expect a sequence of volatile `asm' instructions to remain perfectly consecutive. If you want consecutive output, use a single `asm'. Also, GCC will perform some optimizations across a volatile `asm' instruction; GCC does not "forget everything" when it encounters a volatile `asm' instruction the way some other compilers do. I wonder how we are supposed to code the following sequence: asm volatile ("blah") /* sets funky processor mode */ some_c_code(); asm volatile ("unblah"); Let's say "blah" disables floating point exceptions, and some_c_code() must run without exceptions. Is is possible to code this in gcc without putting functions in another translation unit? Is a memory clobber sufficient? I'd certainly hate to use it. -- Do not meddle in the internals of kernels, for they are subtle and quick to panic. ------------------------------------------------------------------------- Take Surveys. Earn Cash. Influence the Future of IT Join SourceForge.net's Techsay panel and you'll get the chance to share your opinions on IT & business topics through brief surveys - and earn cash http://www.techsay.com/default.php?page=join.php&p=sourceforge&CID=DEVDEV