Re: Plan 9 install problems

[Michael Riepe <michael-0QoEqw4nQxo@public.gmane.org>]

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Hi there!

Avi Kivity wrote:
> Michael Riepe wrote:
> 
>> Hi!
>>
>> Avi Kivity wrote:
>>
>>  
>>
>>> The way to fix is to add handling to {svm,vmx}_get_msr() for msr 1
>>> (and any other pointless msrs the guest reads or writes).  From a
>>> cursory reading of the machine check docs, returning 0 should be fine
>>> for msr 1.

Done, see mce-handling.patch. The AMD part is not tested yet (I don't
have access to an SVM capable machine).

>> Yep.
>>
>> But that doesn't help with Plan9 (just checked it). The installer fails
>> at VM entry later because it tries to use a "big" code segment (limit =
>> 0xffffffff). The same is true for OpenSolaris (cs limit = 0xfffff), by
>> the way.
>>   
> 
> 
> Okay.  Can someone with an AMD machine test these two OSes?  There
> shouldn't be any problems with real mode there.

OpenSolaris runs on Intel with a simple modification: force the CS limit
to 0xffff in real mode (I wonder why that didn't happen already).

Plan9, on the other hand, seems to execute code outside the 64K range.
With cs-limit.patch, it dies at RIP 0x100212. I'm afraid we will need a
full-blown real mode instruction emulator to handle that.

Please apply cs-limit.patch first in order to avoid fuzz.

-- 
Michael "Tired" Riepe <michael-0QoEqw4nQxo@public.gmane.org>
X-Tired: Each morning I get up I die a little

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Signed-off-by: Michael Riepe <michael-0QoEqw4nQxo@public.gmane.org>

Index: vmx.c
===================================================================
--- vmx.c	(revision 4118)
+++ vmx.c	(working copy)
@@ -726,6 +726,7 @@
 	vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
 
 	vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
+	vmcs_write32(GUEST_CS_LIMIT, 0xffff);
 	vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
 
 	fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);

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Signed-off-by: Michael Riepe <michael-0QoEqw4nQxo@public.gmane.org>
 
Index: svm.c
===================================================================
--- svm.c	(revision 4117)
+++ svm.c	(working copy)
@@ -1073,6 +1073,8 @@
 static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)
 {
 	switch (ecx) {
+	case MSR_IA32_P5_MC_ADDR:
+	case MSR_IA32_P5_MC_TYPE:
 	case MSR_IA32_MC0_CTL:
 	case MSR_IA32_MCG_STATUS:
 	case MSR_IA32_MCG_CAP:
Index: vmx.c
===================================================================
--- vmx.c	(revision 4117)
+++ vmx.c	(working copy)
@@ -359,6 +359,8 @@
 	case MSR_IA32_SYSENTER_ESP:
 		data = vmcs_read32(GUEST_SYSENTER_ESP);
 		break;
+	case MSR_IA32_P5_MC_ADDR:
+	case MSR_IA32_P5_MC_TYPE:
 	case MSR_IA32_MC0_CTL:
 	case MSR_IA32_MCG_STATUS:
 	case MSR_IA32_MCG_CAP:

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