From mboxrd@z Thu Jan 1 00:00:00 1970 From: Avi Kivity Subject: Re: [PATCH 0/8] KVM updates for 2.6.20-rc2 Date: Thu, 28 Dec 2006 15:58:12 +0200 Message-ID: <4593CD74.6060202@qumranet.com> References: <45939755.7010603@qumranet.com> <20061228103345.GA4708@elte.hu> <4593A4B7.2070404@qumranet.com> <20061228113038.GA16190@elte.hu> <4593B948.5090009@qumranet.com> <20061228133746.GC3392@elte.hu> <4593CB61.5050709@qumranet.com> <20061228135020.GA7606@elte.hu> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: kvm-devel Return-path: To: Ingo Molnar In-Reply-To: <20061228135020.GA7606-X9Un+BFzKDI@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: kvm-devel-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org Errors-To: kvm-devel-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org List-Id: kvm.vger.kernel.org Ingo Molnar wrote: > * Avi Kivity wrote: > > >>> As SVN has shown it, we can rely on VMX state save/load to become >>> faster in the future. So we definitely shouldnt design for a >>> small-scale overhead in first-generation silicon. >>> >> In this case I think the documentation indicates their long term >> plans. However, the only real answer is to measure. >> > > yeah. Would be nice to see some hard numbers about how many cycles all > these context load/save variants take. > > PIO latency on AMD (including a trip to qemu and back) is 5500 cycles [1]. Intel is significantly higher. [1] http://virt.kernelnewbies.org/KVM/Performance -- error compiling committee.c: too many arguments to function ------------------------------------------------------------------------- Take Surveys. Earn Cash. Influence the Future of IT Join SourceForge.net's Techsay panel and you'll get the chance to share your opinions on IT & business topics through brief surveys - and earn cash http://www.techsay.com/default.php?page=join.php&p=sourceforge&CID=DEVDEV