The following patch saves the host FPU state and loads the guests FPU 
state if !(CR0.MP == 1 && CR0.TS == 1).

When CR0.MP == 1 && CR0.TS == 1, all FPU activity will generate 
exceptions.  OS's use these exceptions to implement lazy FPU loading to 
improve context switch time.  Since any FPU activity will generate 
traps, we don't have to worry about the guest modifying the host FPU state.

My microbenchmark of choice uses FPU operations so I think the results 
are currently tainted.  I've only tested on a 32bit SVM system.

Signed-off-by: Anthony Liguori <anthony-rdkfGonbjUSkNkDKm+mE6A@public.gmane.org>

Regards,

Anthony Liguori