Re: [PATCH 4/4] KVM: Add support for in-kernel LAPIC model

["Gregory Haskins" <ghaskins-Et1tbQHTxzrQT0dZR+AlfA@public.gmane.org>]

>>> On Tue, May 8, 2007 at  4:19 AM, in message <464032A3.2010303-atKUWr5tajBWk0Htik3J/w@public.gmane.org>,
Avi Kivity <avi-atKUWr5tajBWk0Htik3J/w@public.gmane.org> wrote: 
> Gregory Haskins wrote:
>
>> By "drop it", I assume you mean drop the abstraction and just use native 
> HRTIMER directly for now?  
>>
>>   
> 
> Yes, we can worry about compatibility when this merged.
>

Ack.  I have removed the abstraction.
 
>>> [I didn't audit the lapic code]
>>>
>>> Where's vcpu-  >cr8 gone?
>>>     
>>
>> I know you requested that this entry remain in the VCPU structure.  However, 
> I couldnt make this work reasonably.  The APIC wants to maintain this value 
> itself so the two can very easily get out of sync.  I suppose there could be 
> ways to make the APIC use the vcpu- >cr8 variable as storage for TPR (albeit 
> messy), but this idea falls apart when we start looking at optimizations like 
> TPR shadowing.
>>
>> Based on all that, I felt it was best to just maintain CR8 as the TPR 
> register in the model.
>>
>>   
> 
> I don't understand.  Isn't the tpr read- only from the point of view of 
> the lapic?
> 

Not quite.  Its true that the APIC proper views the TPR as read-only.  However, TPR can be set by the CPU using both MOV to CR8 as well as an MMIO operation to the TPR register, and MMIOs are handled by the APIC code (on behalf of the vCPU)

> A simple set_cr8 helper should do the trick.

That would certainly solve the simple MOV to CR8 problem, yes.  I gets a little goofier when we start looking at the MMIO access path, but even that isn't insurmountable.  Where I really hit the wall was when I was thinking about TPR shadowing, which really wants direct access to the contiguous register file of the LAPIC.  I suppose we could give the CPU a real shadow of the registers and simply sync the TPR value on exit.  But it just seemed to be getting hacky for the sake of having vcpu->cr8.  Whats wrong with simply looking at the LAPIC registers when you want to know? ;)


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