[PATCH] implement pop reg in x86_emulate

Kamble, Nitin A
2007-06-07T22:22:02Z

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Hi Avi,
I am in the middle of implementing the big real support in the KVM
now. I am trying to boot SuseLinux 10.1 on KVM, which uses extensive big
real mode code in the boot loader. If you have any other targeted guests
using big real mode do let me know.
I have been working on my own private tree for a while. I sync it
with the KVM tree every day. I have lots of debug code in the
infrastructure part of the big-real mode support. Also I think I may
need to extend/change it further to support more instructions. So I plan
to hold the infrastructure patches for now. Meanwhile I have implemented
emulation of the needed instructions. As it is well contained and should
not affect any code path, this instruction implementation can go
upstream right away,
Attached is a patch for the "pop reg" instruction emulation. I will
be sending more of such instruction emulation patches very soon, I just
need to break them apart from my debug tree. Do provide me if you have
any feedback on these. And once I get the big-real mode support working
well enough, I will start cleaning the remaining code from debug
statements, and start pushing that code in patches to you.

Thanks & Regards,
Nitin
Open Source Technology Center, Intel Corporation.
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commit ad25cea4de1236f5916bf99832ab86348750493b
Author: Nitin A Kamble <nitin.a.kamble@intel.com>
Date: Thu Jun 7 18:06:35 2007 -0700

Implement "pop reg" instruction opcode 0x58-0x5f

diff --git a/drivers/kvm/x86_emulate.c b/drivers/kvm/x86_emulate.c
index a4a8481..46d4124 100644
--- a/drivers/kvm/x86_emulate.c
+++ b/drivers/kvm/x86_emulate.c
@@ -99,7 +99,7 @@ static u8 opcode_table[256] = {
/* 0x40 - 0x4F */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
/* 0x50 - 0x5F */
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, ImplicitOps, 0, 0, 0, 0, 0, 0, 0,
/* 0x60 - 0x6F */
0, 0, 0, DstReg | SrcMem32 | ModRM | Mov /* movsxd (x86/64) */ ,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -1113,6 +1113,17 @@ special_insn:
_eip = ctxt->vcpu->rip;
}
switch (b) {
+ case 0x58 ... 0x5f: /* pop reg */
+ dst.type = OP_REG;
+ dst.bytes = op_bytes;
+ dst.ptr = (unsigned long *)&_regs[b & 0x7];
+
+ if ((rc = ops->read_std(register_address(ctxt->ss_base,
+ _regs[VCPU_REGS_RSP]),
+ dst.ptr, dst.bytes, ctxt)) != 0)
+ goto done;
+ register_address_increment(_regs[VCPU_REGS_RSP], dst.bytes);
+ break;
case 0xa4 ... 0xa5: /* movs */
dst.type = OP_MEM;
dst.bytes = (d & ByteOp) ? 1 : op_bytes;

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