From: Avi Kivity <avi-atKUWr5tajBWk0Htik3J/w@public.gmane.org>
To: "Li, Xin B" <xin.b.li-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
Cc: kvm-devel <kvm-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org>
Subject: Re: [patch] wrong tlb flush order
Date: Thu, 21 Jun 2007 11:50:09 +0300 [thread overview]
Message-ID: <467A3BC1.4030808@qumranet.com> (raw)
In-Reply-To: <B30DA1341B0CFA4893EF8A36B40B5C5D014859EA-wq7ZOvIWXbNpB2pF5aRoyrfspsVTdybXVpNB7YpNyf8@public.gmane.org>
Li, Xin B wrote:
>> BTW,
>>
>> The current VMX code does not make sense to me:
>>
>> static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
>> {
>> vmcs_writel(GUEST_CR3, vmcs_readl(GUEST_CR3));
>> }
>>
>>
>
> The point is, vmexits will invalidate all TLB entries on Intel VT
> processor today.
>
Yes. This was based on some text in the manual that I can't find
anymore. I long suspected that it is unnecessary.
--
error compiling committee.c: too many arguments to function
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prev parent reply other threads:[~2007-06-21 8:50 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-06-20 9:13 [patch] wrong tlb flush order Shaohua Li
[not found] ` <1182330806.31486.3.camel-yAZKuqJtXNMXR+D7ky4Foa2pdiUAq4bhAL8bYrjMMd8@public.gmane.org>
2007-06-20 9:39 ` Avi Kivity
[not found] ` <4678F5E7.7070908-atKUWr5tajBWk0Htik3J/w@public.gmane.org>
2007-06-20 19:07 ` Nakajima, Jun
[not found] ` <97D612E30E1F88419025B06CB4CF1BE102862D5D-1a9uaKK1+wJcIJlls4ac1rfspsVTdybXVpNB7YpNyf8@public.gmane.org>
2007-06-21 2:05 ` Li, Xin B
[not found] ` <B30DA1341B0CFA4893EF8A36B40B5C5D014859EA-wq7ZOvIWXbNpB2pF5aRoyrfspsVTdybXVpNB7YpNyf8@public.gmane.org>
2007-06-21 8:50 ` Avi Kivity [this message]
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