Re: In kernel PIC support: kernel patch

Gregory Haskins
2007-06-25T13:53:52Z

On Mon, 2007-06-25 at 11:32 +0800, Dong, Eddie wrote:
> Avi Kivity wrote:
> > Dong, Eddie wrote:
> > We'll add it as soon as it becomes necessary. But isn't it
> > just a memory
> > write?

On real HW, yes. The Intel guys can correct me if I am wrong, but I
think we can actually simplify this in the virtual-world. My impression
from reading the specs is that the address that you write to effectively
lets you generate an APIC bus message from a PCI bus-master. The data
of the message looks very much like an APIC message, which in turn looks
very similar to what you program an IOAPIC pin to map to.

Therefore, if you want to generate MSIs I think you can just have the
pv-device call kvm_apicbus_send() as opposed to emulating the memory
write. I'm not sure if this helps or not (e.g. perhaps we *want* to
emulate the bus-master write for supporting some pv-device that wouldn't
have access to the KVM_APIC_MSG api for some reason?)