Re: [PATCH] lmsw sets lower 16 bits of cr0, not just lower 4

[Avi Kivity <avi-atKUWr5tajBWk0Htik3J/w@public.gmane.org>]

Rusty Russell wrote:
> According to my Intel manual, although lmsw only causes an exit when
> trying to set the bottom 4 bits, it is supposed to set the bottom 16
> bits of cr0.
>
>   

Well, _my_ Intel manual (2A) says:

> Loads the source operand into the machine status word, bits 0 through 
> 15 of register CR0. The
> source operand can be a 16-bit general-purpose register or a memory 
> location. Only the low-
> order 4 bits of the source operand (which contains the PE, MP, EM, and 
> TS flags) are loaded
> into CR0. The PG, CD, NW, AM, WP, NE, and ET flags of CR0 are not 
> affected. The operand-
> size attribute has no effect on this instruction.


-- 
error compiling committee.c: too many arguments to function


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