From mboxrd@z Thu Jan 1 00:00:00 1970 From: Avi Kivity Subject: Re: Windows guest reboot failure Date: Thu, 27 Sep 2007 11:09:15 +0200 Message-ID: <46FB733B.4080102@qumranet.com> References: <37E52D09333DE2469A03574C88DBF40FA9C256@pdsmsx414.ccr.corp.intel.com> <46FA1E70.8080802@qumranet.com> <10EA09EFD8728347A513008B6B0DA77A02249DBF@pdsmsx411.ccr.corp.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: kvm-devel , "He, Qing" To: "Dong, Eddie" Return-path: In-Reply-To: <10EA09EFD8728347A513008B6B0DA77A02249DBF-wq7ZOvIWXbNpB2pF5aRoyrfspsVTdybXVpNB7YpNyf8@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: kvm-devel-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org Errors-To: kvm-devel-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org List-Id: kvm.vger.kernel.org Dong, Eddie wrote: >> I think #2. Synchronization will be difficult; we'll need to send >> signals to all other vcpus so that they drop the vcpu mutex. >> >> > How about add a new ABI KVM_RESET_KERNDEVS ? > We don't want to implement RESET ABIs for each kernel devices > especially when we move PIT down and then RTC, pmtimer etc. > I thought that was what Qing proposed :) I think we want at least a separate reset for LAPIC and IOAPICs, that pushes the synchronization issues to userspace (though it may introduce other issues like lapic issuing eois to ioapic after the ioapic has been reset). -- Do not meddle in the internals of kernels, for they are subtle and quick to panic. ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2005. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/