From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anthony Liguori Subject: Re: [kvm-ppc-devel] [PATCH 1 of 3] Move x86 kvmcallback structure to kvmctl-x86.h header Date: Mon, 29 Oct 2007 09:12:20 -0500 Message-ID: <4725EA44.1080606@codemonkey.ws> References: <3bf072e498768885ab96.1193618567@thinkpad> <4725415B.4020601@codemonkey.ws> <1193627660.17368.55.camel@basalt> <47255892.2090308@codemonkey.ws> <1193631282.17368.63.camel@basalt> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: kvm-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org, kvm-ppc-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org, Jerone Young To: Hollis Blanchard Return-path: In-Reply-To: <1193631282.17368.63.camel@basalt> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: kvm-devel-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org Errors-To: kvm-devel-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org List-Id: kvm.vger.kernel.org Hollis Blanchard wrote: > On Sun, 2007-10-28 at 22:50 -0500, Anthony Liguori wrote: > >> You could certainly get even more clever and have the arch backend >> register the appropriate tables based on the as type but that's merely >> an implementation detail. The key observation, that I believe is >> correct, is that all architectures have one or more IO "address >> spaces" that have at max a 64-bit address space and support at max >> 64-bit input/output operations. Once that assumption is made, almost >> all IO code becomes common. >> > > Just FYI, some PowerPC have "load/store quad", which are 128-bit memory > accesses. Can you do MMIO with these instructions though? I'm not really sure what would happen on x86 if you did MMIO with a 128-bit instruction. Regards, Anthony Liguori > For that matter, I suppose one could do IO loads into Altivec > registers (which are also 128 bits), though that sounds like an extreme > case. I wonder if the same is true for x86 vector registers. > > Also, can't x86 "rep" instructions go beyond 64 bits? I guess that must > be handled in the arch-specific caller of io_write(), which would call > it multiple times. > > ------------------------------------------------------------------------- This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/