From mboxrd@z Thu Jan 1 00:00:00 1970 From: Carsten Otte Subject: Re: RFC/patch portability: split kvm_vm_ioctl v3 Date: Tue, 30 Oct 2007 16:57:04 +0100 Message-ID: <47275450.5010205@de.ibm.com> References: <1192192452.7630.16.camel@cotte.boeblingen.de.ibm.com><1193327325.8345.9.camel@cotte.boeblingen.de.ibm.com><1193400099.10970.8.camel@cotte.boeblingen.de.ibm.com><10EA09EFD8728347A513008B6B0DA77A024CEC4D@pdsmsx411.ccr.corp.intel.com><47270F9E.5080007@qumranet.com><10EA09EFD8728347A513008B6B0DA77A024CEC54@pdsmsx411.ccr.corp.intel.com><47271C9B.1050804@de.ibm.com> <4727204E.6000606@qumranet.com><47272410.9020502@de.ibm.com> <47272556.1030901@qumranet.com> <47272D08.9080501@de.ibm.com> <10EA09EFD8728347A513008B6B0DA77A024CECA8@pdsmsx411.ccr.corp.intel.com> Reply-To: carsteno-tA70FqPdS9bQT0dZR+AlfA@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: carsteno-23VcF4HTsmIX0ybBhKVfKdBPR1lH4CV8@public.gmane.org, Hollis Blanchard , carsteno-tA70FqPdS9bQT0dZR+AlfA@public.gmane.org, Avi Kivity , kvm-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org, "Zhang, Xiantao" To: "Dong, Eddie" Return-path: In-Reply-To: <10EA09EFD8728347A513008B6B0DA77A024CECA8-wq7ZOvIWXbNpB2pF5aRoyrfspsVTdybXVpNB7YpNyf8@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: kvm-devel-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org Errors-To: kvm-devel-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org List-Id: kvm.vger.kernel.org Dong, Eddie wrote: > IA64/KVM will handle interrupt in kernel including IPI IMO, so what > user level need to tell kernel is which platform IRQ pin is set/cleared. > > Can't S390 do in similar way? From platform point of view, each > irq can have a unique # and the device itself doesn;t need to know > which CPU will receive it. Are talking about having your interrupt > controller in user space? or I missed something. We don't have interrupt controllers in the first place, and therefore we don't need to emulate them. We want to handle IPI inside the kernel too, and we also need to be able to inject interrupts from userspace. Would you be able to encode your interrupt related information into an __u64 data type? Do all CPUs have the same interrupts pending, or is the information per-cpu? Does the data structure that Avi suggested fit your interrupt injection needs? struct kvm_interrupt { __u64 vector; __u32 size; /* bytes, must be multiple of 8 */ __u32 pad; __u64 cpuset[0]; }; ------------------------------------------------------------------------- This SF.net email is sponsored by: Splunk Inc. Still grepping through log files to find problems? Stop. Now Search log events and configuration files using AJAX and a browser. Download your FREE copy of Splunk now >> http://get.splunk.com/