Re: [PATCH] discard MSR writes

[Avi Kivity <avi-atKUWr5tajBWk0Htik3J/w@public.gmane.org>]

Amit Shah wrote:
> On Tuesday 20 November 2007 15:17:54 Avi Kivity wrote:
>   
>> Amit Shah wrote:
>>     
>>> On Tuesday 20 November 2007 00:38:05 Markus Rechberger wrote:
>>>       
>>>> this patch discards MSR writes to the Performance Event-Select
>>>> Registers, this is the first issue why vista seems to fail although now
>>>> vista ends up in an endless loop a bit later.
>>>> Qemu currently also discards those writes.
>>>>         
>>> Won't this make the corresponding rdmsrs fail? What happens when the
>>> rdmsr returns an error, but windows then uses some garbage value (as it
>>> thinks the wrmsr succeeded, so the rdmsr also should)?
>>>       
>> rdmsr will inject #GP for these msrs.  Implementing set_msr() doesn't
>> affect rdmsr.
>>     
>
> >From the AMD programming manual, vol 2:
>
> The performance event-select registers can be read and written only by system 
> software running at CPL = 0 using the RDMSR and WRMSR instructions, 
> respectively. Any attempt to read or write these registers at CPL > 0 causes 
> a general-protection exception to occur.
>   

Look through the code that implements rdmsr, it doesn't care about the 
manuals and will happily inject a #GP for rdmsr of any unimplemented msr 
(like PerfEvtSel)  wrmsr and rdmsr implementations are not linked.

-- 
error compiling committee.c: too many arguments to function


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